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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] x86/spec-ctrl: Enumerations for DDP controls
commit d04ae78c34e7e21d9be79301cad7dc085873656a
Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Fri Mar 10 15:54:28 2023 +0000
Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Mon Mar 13 11:26:26 2023 +0000
x86/spec-ctrl: Enumerations for DDP controls
https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/data-dependent-prefetcher.html
We should offer DDP-CTRL to guests, but I'm not sure when it is appearing in
hardware, and it's not massively urgent - the DDP behaviour is mostly sane
(having been designed in a post-spectre world) and this is a just-in-case
control.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
---
tools/libs/light/libxl_cpuid.c | 1 +
tools/misc/xen-cpuid.c | 2 +-
xen/arch/x86/include/asm/msr-index.h | 1 +
xen/include/public/arch-x86/cpufeatureset.h | 1 +
4 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c
index 1d4e8a6b00..9686359810 100644
--- a/tools/libs/light/libxl_cpuid.c
+++ b/tools/libs/light/libxl_cpuid.c
@@ -242,6 +242,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list
*cpuid, const char* str)
{"intel-psfd", 0x00000007, 2, CPUID_REG_EDX, 0, 1},
{"ipred-ctrl", 0x00000007, 2, CPUID_REG_EDX, 1, 1},
{"rrsba-ctrl", 0x00000007, 2, CPUID_REG_EDX, 2, 1},
+ {"ddp-ctrl", 0x00000007, 2, CPUID_REG_EDX, 3, 1},
{"bhi-ctrl", 0x00000007, 2, CPUID_REG_EDX, 4, 1},
{"mcdt-no", 0x00000007, 2, CPUID_REG_EDX, 5, 1},
diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c
index 4f4261f4aa..868054ab96 100644
--- a/tools/misc/xen-cpuid.c
+++ b/tools/misc/xen-cpuid.c
@@ -216,7 +216,7 @@ static const char *const str_7d1[32] =
static const char *const str_7d2[32] =
{
[ 0] = "intel-psfd", [ 1] = "ipred-ctrl",
- [ 2] = "rrsba-ctrl",
+ [ 2] = "rrsba-ctrl", [ 3] = "ddp-ctrl",
[ 4] = "bhi-ctrl", [ 5] = "mcdt-no",
};
diff --git a/xen/arch/x86/include/asm/msr-index.h
b/xen/arch/x86/include/asm/msr-index.h
index 7615d8087f..fa771ed0b5 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -41,6 +41,7 @@
#define SPEC_CTRL_RRSBA_DIS_U (_AC(1, ULL) << 5)
#define SPEC_CTRL_RRSBA_DIS_S (_AC(1, ULL) << 6)
#define SPEC_CTRL_PSFD (_AC(1, ULL) << 7)
+#define SPEC_CTRL_DDP_DIS_U (_AC(1, ULL) << 8)
#define SPEC_CTRL_BHI_DIS_S (_AC(1, ULL) << 10)
#define MSR_PRED_CMD 0x00000049
diff --git a/xen/include/public/arch-x86/cpufeatureset.h
b/xen/include/public/arch-x86/cpufeatureset.h
index 336744b471..0888519087 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -294,6 +294,7 @@ XEN_CPUFEATURE(INTEL_PPIN, 12*32+ 0) /* Protected
Processor Inventory
XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */
XEN_CPUFEATURE(IPRED_CTRL, 13*32+ 1) /* MSR_SPEC_CTRL.IPRED_DIS_* */
XEN_CPUFEATURE(RRSBA_CTRL, 13*32+ 2) /* MSR_SPEC_CTRL.RRSBA_DIS_* */
+XEN_CPUFEATURE(DDP_CTRL, 13*32+ 3) /* MSR_SPEC_CTRL.DDP_DIS_U */
XEN_CPUFEATURE(BHI_CTRL, 13*32+ 4) /* MSR_SPEC_CTRL.BHI_DIS_S */
XEN_CPUFEATURE(MCDT_NO, 13*32+ 5) /*A MCDT_NO */
--
generated by git-patchbot for /home/xen/git/xen.git#master
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