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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen stable-4.14] x86/spec-ctrl: Disable retpolines with CET-IBT
commit 631d8408bbb424aed9f5fa3579a22aa1027e9902
Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Mon Feb 28 19:26:37 2022 +0000
Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Fri Mar 25 17:11:55 2022 +0000
x86/spec-ctrl: Disable retpolines with CET-IBT
CET-IBT depend on executing indirect branches for protections to apply.
Extend the clobber for CET-SS to all of CET.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
(cherry picked from commit 6e3f36387de566b09aa4145ea0e3bfe4814d68b4)
---
xen/arch/x86/spec_ctrl.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 7ded6ecba1..1e226102d3 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -919,13 +919,14 @@ void __init init_speculation_mitigations(void)
boot_cpu_has(X86_FEATURE_IBRS));
/*
- * First, disable the use of retpolines if Xen is using shadow stacks, as
- * they are incompatible.
+ * First, disable the use of retpolines if Xen is using CET. Retpolines
+ * are a ROP gadget so incompatbile with Shadow Stacks, while IBT depends
+ * on executing indirect branches for the safety properties to apply.
*
* In the absence of retpolines, IBRS needs to be used for speculative
* safety. All CET-capable hardware has efficient IBRS.
*/
- if ( cpu_has_xen_shstk )
+ if ( read_cr4() & X86_CR4_CET )
{
if ( !has_spec_ctrl )
printk(XENLOG_WARNING "?!? CET active, but no MSR_SPEC_CTRL?\n");
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14
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