[xen staging] x86/Intel: skip CORE_THREAD_COUNT read on family 0xf

[patchbot@xxxxxxx]

commit 9112d19853bc509b9c9997757393688657d5a087
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Mon Feb 14 10:05:38 2022 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Mon Feb 14 10:05:38 2022 +0100

    x86/Intel: skip CORE_THREAD_COUNT read on family 0xf
    
    This avoids an unnecessary (and always somewhat scary) log message for
    the recovered from #GP(0).
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Acked-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
---
 xen/arch/x86/spec_ctrl.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index cbeeb19903..db27bc3f64 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -453,7 +453,8 @@ static bool __init check_smt_enabled(void)
      * At the time of writing, it is almost completely undocumented, so isn't
      * virtualised reliably.
      */
-    if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && !cpu_has_hypervisor &&
+    if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
+         boot_cpu_data.x86 != 0xf && !cpu_has_hypervisor &&
          !rdmsr_safe(MSR_INTEL_CORE_THREAD_COUNT, val) )
         return (MASK_EXTR(val, MSR_CTC_CORE_MASK) !=
                 MASK_EXTR(val, MSR_CTC_THREAD_MASK));
--
generated by git-patchbot for /home/xen/git/xen.git#staging