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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen staging] x86/cpuid: Fix handling of the CPUID.7[0].eax levelling MSR
commit b50d78d0eaffb43d5f5ceeda55fa22c11f47d01b
Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Fri Sep 6 16:59:02 2019 +0100
Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Tue Sep 10 13:33:21 2019 +0100
x86/cpuid: Fix handling of the CPUID.7[0].eax levelling MSR
7a0 is an integer field, not a mask - taking the logical and of the hardware
and policy values results in nonsense. Instead, take the policy value
directly.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Reviewed-by: Roger Pau Monné <roger.pau@xxxxxxxxxxx>
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
---
xen/arch/x86/domctl.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 1e98fc8009..a744696c6b 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -218,11 +218,16 @@ static int update_domain_cpuid_info(struct domain *d,
if ( is_pv_domain(d) && ((levelling_caps & LCAP_7ab0) == LCAP_7ab0) )
{
uint64_t mask = cpuidmask_defaults._7ab0;
- uint32_t eax = ctl->eax;
- uint32_t ebx = p->feat._7b0;
- if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD |
X86_VENDOR_HYGON) )
- mask &= ((uint64_t)eax << 32) | ebx;
+ /*
+ * Leaf 7[0].eax is max_subleaf, not a feature mask. Take it
+ * wholesale from the policy, but clamp the features in 7[0].ebx
+ * per usual.
+ */
+ if ( boot_cpu_data.x86_vendor &
+ (X86_VENDOR_AMD | X86_VENDOR_HYGON) )
+ mask = (((uint64_t)p->feat.max_subleaf << 32) |
+ ((uint32_t)mask & p->feat._7b0));
d->arch.pv.cpuidmasks->_7ab0 = mask;
}
--
generated by git-patchbot for /home/xen/git/xen.git#staging
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