[Xen-changelog] [xen staging] x86/suspend: Simplify system table handling on resume

[patchbot@xxxxxxx]

commit bb70bcb65b9708812bfb3f2cb86189fc347da2d7
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Mon Aug 12 18:40:04 2019 +0100
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Wed Aug 28 18:51:00 2019 +0100

    x86/suspend: Simplify system table handling on resume
    
    load_TR() is used exclusively in the resume path, but jumps through a lot of
    unnecessary hoops.  As suspend/resume is strictly on CPU0 in idle context, 
the
    correct GDT to use is boot_gdt, which means it doesn't need saving on 
suspend.
    
    Although doing more than strictly necessary, reuse load_system_tables(), 
which
    is already used by APs on the S3 resume path.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/acpi/suspend.c     |  2 +-
 xen/arch/x86/acpi/wakeup_prot.S | 13 +------------
 xen/arch/x86/traps.c            | 21 ---------------------
 xen/include/asm-x86/desc.h      |  2 --
 4 files changed, 2 insertions(+), 36 deletions(-)

diff --git a/xen/arch/x86/acpi/suspend.c b/xen/arch/x86/acpi/suspend.c
index ba9d2e13a7..c9dea67bf3 100644
--- a/xen/arch/x86/acpi/suspend.c
+++ b/xen/arch/x86/acpi/suspend.c
@@ -41,7 +41,7 @@ void save_rest_processor_state(void)
 
 void restore_rest_processor_state(void)
 {
-    load_TR();
+    load_system_tables();
 
     /* Recover syscall MSRs */
     wrmsrl(MSR_LSTAR, saved_lstar);
diff --git a/xen/arch/x86/acpi/wakeup_prot.S b/xen/arch/x86/acpi/wakeup_prot.S
index 9e9fcc1ab6..74261cb4f1 100644
--- a/xen/arch/x86/acpi/wakeup_prot.S
+++ b/xen/arch/x86/acpi/wakeup_prot.S
@@ -34,10 +34,6 @@ ENTRY(do_suspend_lowlevel)
 
         mov     %ss, REF(saved_ss)
 
-        sgdt    REF(saved_gdt)
-        sidt    REF(saved_idt)
-        sldt    REF(saved_ldt)
-
         mov     %cr0, GREG(ax)
         mov     GREG(ax), REF(saved_cr0)
 
@@ -55,6 +51,7 @@ ENTRY(do_suspend_lowlevel)
 
 
 ENTRY(__ret_point)
+        lgdt    boot_gdtr(%rip)
 
         /* mmu_cr4_features contains latest cr4 setting */
         mov     REF(mmu_cr4_features), GREG(ax)
@@ -66,10 +63,6 @@ ENTRY(__ret_point)
         mov     REF(saved_cr0), GREG(ax)
         mov     GREG(ax), %cr0
 
-        lgdt    REF(saved_gdt)
-        lidt    REF(saved_idt)
-        lldt    REF(saved_ldt)
-
         mov     REF(saved_ss), %ss
         LOAD_GREG(sp)
 
@@ -129,9 +122,5 @@ DECLARE_GREG(13)
 DECLARE_GREG(14)
 DECLARE_GREG(15)
 
-saved_gdt:      .quad   0,0
-saved_idt:      .quad   0,0
-saved_ldt:      .quad   0,0
-
 saved_cr0:      .quad   0
 saved_cr3:      .quad   0
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index d848ebb1c7..16c590d5d3 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1887,27 +1887,6 @@ static void __init set_intr_gate(unsigned int n, void 
*addr)
     __set_intr_gate(n, 0, addr);
 }
 
-void load_TR(void)
-{
-    struct tss64 *tss = &this_cpu(tss_page).tss;
-    struct desc_ptr old_gdt, tss_gdt = {
-        .base = (long)(this_cpu(gdt) - FIRST_RESERVED_GDT_ENTRY),
-        .limit = LAST_RESERVED_GDT_BYTE
-    };
-
-    _set_tssldt_desc(
-        this_cpu(gdt) + TSS_ENTRY - FIRST_RESERVED_GDT_ENTRY,
-        (unsigned long)tss, sizeof(*tss) - 1, SYS_DESC_tss_avail);
-    _set_tssldt_desc(
-        this_cpu(compat_gdt) + TSS_ENTRY - FIRST_RESERVED_GDT_ENTRY,
-        (unsigned long)tss, sizeof(*tss) - 1, SYS_DESC_tss_busy);
-
-    /* Switch to non-compat GDT (which has B bit clear) to execute LTR. */
-    asm volatile (
-        "sgdt %0; lgdt %2; ltr %w1; lgdt %0"
-        : "=m" (old_gdt) : "rm" (TSS_SELECTOR), "m" (tss_gdt) : "memory" );
-}
-
 static unsigned int calc_ler_msr(void)
 {
     switch ( boot_cpu_data.x86_vendor )
diff --git a/xen/include/asm-x86/desc.h b/xen/include/asm-x86/desc.h
index 603b9a9013..24db3e9510 100644
--- a/xen/include/asm-x86/desc.h
+++ b/xen/include/asm-x86/desc.h
@@ -216,8 +216,6 @@ DECLARE_PER_CPU(seg_desc_t *, compat_gdt);
 DECLARE_PER_CPU(l1_pgentry_t, compat_gdt_l1e);
 DECLARE_PER_CPU(bool, full_gdt_loaded);
 
-extern void load_TR(void);
-
 static inline void lgdt(const struct desc_ptr *gdtr)
 {
     __asm__ __volatile__ ( "lgdt %0" :: "m" (*gdtr) : "memory" );
--
generated by git-patchbot for /home/xen/git/xen.git#staging

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