[Xen-changelog] [qemu-xen master] tcg: correct 32-bit tcg_gen_ld8s_i64 sign-extension

[patchbot@xxxxxxx]

commit 3ff91d7e85176f8b4b131163d7fd801757a2c949
Author:     Joseph Myers <joseph@xxxxxxxxxxxxxxxx>
AuthorDate: Thu Oct 27 23:35:04 2016 +0000
Commit:     Richard Henderson <rth@xxxxxxxxxxx>
CommitDate: Tue Nov 1 10:30:45 2016 -0600

    tcg: correct 32-bit tcg_gen_ld8s_i64 sign-extension
    
    The version of tcg_gen_ld8s_i64 for 32-bit systems does a load into
    the low part of the return value - then attempts a sign extension into
    the high part, but wrongly sets the high part to a sign extension of
    itself rather than of the low part.  This results in TCG internal
    errors from the use of the uninitialized high part (in some GCC tests
    of AArch64 NEON shift intrinsics, in particular).  This patch corrects
    the sign-extension logic, making it match other functions such as
    tcg_gen_ld16s_i64.
    
    Reviewed-by: Peter Maydell <peter.maydell@xxxxxxxxxx>
    Signed-off-by: Joseph Myers <joseph@xxxxxxxxxxxxxxxx>
    Message-Id: <alpine.DEB.2.20.1610272333560.22353@xxxxxxxxxxxxxxxxxxxxxxxx>
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
---
 tcg/tcg-op.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 4d125df..6e2fb35 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -817,7 +817,7 @@ void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, 
tcg_target_long offset)
 void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
 {
     tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset);
-    tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), 31);
+    tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31);
 }
 
 void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset)
--
generated by git-patchbot for /home/xen/git/qemu-xen.git#master

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