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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen master] tools/libxc: Properly increment ApicIdCoreSize field on AMD
commit a3336a507519c1d28db3bbff8e439aa3811733f3
Author: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
AuthorDate: Fri Jul 22 13:14:01 2016 -0400
Commit: Wei Liu <wei.liu2@xxxxxxxxxx>
CommitDate: Mon Jul 25 14:07:50 2016 +0100
tools/libxc: Properly increment ApicIdCoreSize field on AMD
Current code incorrectly adds 1 to full register instead of
incrementing the field in bits 15:12.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
Acked-by: Wei Liu <wei.liu2@xxxxxxxxxx>
---
tools/libxc/xc_cpuid_x86.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index 84f4e08..fbbac9e 100644
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -331,7 +331,8 @@ static void amd_xc_cpuid_policy(xc_interface *xch,
* ECX[15:12] is ApicIdCoreSize: ECX[7:0] is NumberOfCores (minus one).
* Update to reflect vLAPIC_ID = vCPU_ID * 2.
*/
- regs[2] = ((regs[2] & 0xf000u) + 1) | ((regs[2] & 0xffu) << 1) | 1u;
+ regs[2] = ((regs[2] + (1u << 12)) & 0xf000u) |
+ ((regs[2] & 0xffu) << 1) | 1u;
break;
case 0x8000000a: {
--
generated by git-patchbot for /home/xen/git/xen.git#master
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