[Xen-changelog] [xen master] mwait-idle: add support for the Airmont Core in the Cherrytrail and Braswell SOCs

[patchbot@xxxxxxx]

commit 0c3580814afe7458c4072f0e45714d38d59fa595
Author:     Len Brown <len.brown@xxxxxxxxx>
AuthorDate: Wed May 20 13:24:34 2015 +0200
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Wed May 20 13:24:34 2015 +0200

    mwait-idle: add support for the Airmont Core in the Cherrytrail and 
Braswell SOCs
    
    Support C-states for the Airmont core in the Cherrytrail and Braswell
    SOCs. The states are similar to those of Silvermont in Baytrail, except
    both flavors of C6 states are faster.
    
    Signed-off-by: Len Brown <len.brown@xxxxxxxxx>
    [Linux commit cab07a5652d1d124b505c2b7ed21c6823295c5d7]
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/cpu/mwait-idle.c |   41 +++++++++++++++++++++++++++++++++++++++++
 1 files changed, 41 insertions(+), 0 deletions(-)

diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c
index bea31b1..162e19b 100644
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -222,6 +222,40 @@ static const struct cpuidle_state byt_cstates[] = {
        {}
 };
 
+static const struct cpuidle_state cht_cstates[] = {
+       {
+               .name = "C1-CHT",
+               .flags = MWAIT2flg(0x00),
+               .exit_latency = 1,
+               .target_residency = 1,
+       },
+       {
+               .name = "C6N-CHT",
+               .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 80,
+               .target_residency = 275,
+       },
+       {
+               .name = "C6S-CHT",
+               .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 200,
+               .target_residency = 560,
+       },
+       {
+               .name = "C7-CHT",
+               .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 1200,
+               .target_residency = 4000,
+       },
+       {
+               .name = "C7S-CHT",
+               .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 10000,
+               .target_residency = 20000,
+       },
+       {}
+};
+
 static const struct cpuidle_state ivb_cstates[] = {
        {
                .name = "C1-IVB",
@@ -625,6 +659,12 @@ static const struct idle_cpu idle_cpu_byt = {
        .byt_auto_demotion_disable_flag = 1,
 };
 
+static const struct idle_cpu idle_cpu_cht = {
+       .state_table = cht_cstates,
+       .disable_promotion_to_c1e = 1,
+       .byt_auto_demotion_disable_flag = 1,
+};
+
 static const struct idle_cpu idle_cpu_ivb = {
        .state_table = ivb_cstates,
        .disable_promotion_to_c1e = 1,
@@ -669,6 +709,7 @@ static struct intel_idle_id {
        ICPU(0x2d, snb),
        ICPU(0x36, atom),
        ICPU(0x37, byt),
+       ICPU(0x4c, cht),
        ICPU(0x3a, ivb),
        ICPU(0x3e, ivt),
        ICPU(0x3c, hsw),
--
generated by git-patchbot for /home/xen/git/xen.git#master

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