[Xen-changelog] [xen master] xen/arm: Trap cache and TCM lockdown registers

[patchbot@xxxxxxx]

commit 11faafd9d9739a47d5fa360a43669f52672ef40e
Author:     Julien Grall <julien.grall@xxxxxxxxxx>
AuthorDate: Mon Apr 14 20:00:14 2014 +0100
Commit:     Ian Campbell <ian.campbell@xxxxxxxxxx>
CommitDate: Wed Apr 23 10:31:07 2014 +0100

    xen/arm: Trap cache and TCM lockdown registers
    
    Some cp15 c9/c10/c11 encodings are used for:
         - cache control
         - TCM control
         - branch predictor control
    
    All of them are implementation defined. For now inject an undefined 
exception
    if the guest wants try to access it.
    
    This is CVE-2014-2915 / XSA-93.
    
    Signed-off-by: Julien Grall <julien.grall@xxxxxxxxxx>
    Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---
 xen/arch/arm/traps.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 17ac8d8..b77e623 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -82,7 +82,7 @@ void __cpuinit init_traps(void)
 
     /* Setup hypervisor traps */
     WRITE_SYSREG(HCR_PTW|HCR_BSU_INNER|HCR_AMO|HCR_IMO|HCR_VM|HCR_TWI|HCR_TSC|
-                 HCR_TAC|HCR_SWIO, HCR_EL2);
+                 HCR_TAC|HCR_SWIO|HCR_TIDCP, HCR_EL2);
     isb();
 }
 
--
generated by git-patchbot for /home/xen/git/xen.git#master

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