[Xen-changelog] [xen master] x86/VT-x: Disable MSR intercept for SHADOW_GS_BASE

[patchbot@xxxxxxx]

commit a82e98d473fd212316ea5aa078a7588324b020e5
Author:     Paul Durrant <paul.durrant@xxxxxxxxxx>
AuthorDate: Fri Nov 15 11:02:17 2013 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Fri Nov 15 11:02:17 2013 +0100

    x86/VT-x: Disable MSR intercept for SHADOW_GS_BASE
    
    Intercepting this MSR is pointless - The swapgs instruction does not cause a
    vmexit, so the cached result of this is potentially stale after the next 
guest
    instruction.  It is correctly saved and restored on vcpu context switch.
    
    Furthermore, 64bit Windows writes to this MSR on every thread context 
switch,
    so interception causes a substantial performance hit.
    
    Signed-off-by: Paul Durrant <paul.durrant@xxxxxxxxxx>
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Tim Deegan <tim@xxxxxxx>
    Acked-by: Jun Nakajima <jun.nakajima@xxxxxxxxx>
---
 xen/arch/x86/hvm/vmx/vmcs.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index 290b42f..4aab971 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -950,6 +950,7 @@ static int construct_vmcs(struct vcpu *v)
 
         vmx_disable_intercept_for_msr(v, MSR_FS_BASE, MSR_TYPE_R | MSR_TYPE_W);
         vmx_disable_intercept_for_msr(v, MSR_GS_BASE, MSR_TYPE_R | MSR_TYPE_W);
+        vmx_disable_intercept_for_msr(v, MSR_SHADOW_GS_BASE, MSR_TYPE_R | 
MSR_TYPE_W);
         vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_CS, MSR_TYPE_R | 
MSR_TYPE_W);
         vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_ESP, MSR_TYPE_R | 
MSR_TYPE_W);
         vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_EIP, MSR_TYPE_R | 
MSR_TYPE_W);
--
generated by git-patchbot for /home/xen/git/xen.git#master

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