[Xen-changelog] [xen master] rombios/ata: Do not wait for BSY to be set

[patchbot@xxxxxxx]

commit 413a6fb4ee81897acafefb90f81ef3d2661c3aa6
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Tue Aug 6 14:48:37 2013 +0100
Commit:     Ian Campbell <ian.campbell@xxxxxxxxxx>
CommitDate: Thu Aug 8 12:03:12 2013 +0100

    rombios/ata: Do not wait for BSY to be set
    
    After issuing a reset, the BSY bit is expected to be set.  This is not the
    case for Qemu.
    
    In SeaBIOS.git: 580e33293244fee4556e56ecc67b8bd877f3c496
    
    this check was even replaced with a udelay(5), as enough real hardware 
ignored
    the BSY bit as well.
    
    As rombios does not have an equivalent udelay(), replace the wait with a 
write
    to port 0x80 which is whitelisted by Xen for 'a small delay'.
    
    This causes 42k fewer IO traps to Qemu.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Acked-by: Keir Fraser <keir@xxxxxxx>
---
 tools/firmware/rombios/rombios.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/firmware/rombios/rombios.c b/tools/firmware/rombios/rombios.c
index e364759..a3efc61 100644
--- a/tools/firmware/rombios/rombios.c
+++ b/tools/firmware/rombios/rombios.c
@@ -2914,8 +2914,8 @@ Bit16u device;
 // 8.2.1 (a) -- set SRST in DC
   outb(iobase2+ATA_CB_DC, ATA_CB_DC_HD15 | ATA_CB_DC_NIEN | ATA_CB_DC_SRST);
 
-// 8.2.1 (b) -- wait for BSY
-  await_ide(BSY, iobase1, 20);
+// 8.2.1 (b) -- wait
+  outb(0x80, 0x00);
 
 // 8.2.1 (f) -- clear SRST
   outb(iobase2+ATA_CB_DC, ATA_CB_DC_HD15 | ATA_CB_DC_NIEN);
--
generated by git-patchbot for /home/xen/git/xen.git#master

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