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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen master] xen/arm: Fix guest secondaries CPU boot after bcac10f
commit 6072b7c808043b6886c33f896e06fc32ee28346e
Author: Julien Grall <julien.grall@xxxxxxxxxx>
AuthorDate: Tue Jul 30 00:18:28 2013 +0100
Commit: Ian Campbell <ian.campbell@xxxxxxxxxx>
CommitDate: Tue Jul 30 09:36:18 2013 +0100
xen/arm: Fix guest secondaries CPU boot after bcac10f
The commit bcac10f "xen: arm: support building a 64-bit dom0 domain" breaks
secondary cpus boot for all the guest. Linux requires CPUs to boot on SVC
mode.
Divide PSR_GUEST_INIT in 2 distinct defines: one for 32 bit, the other for
64
bits guests.
Signed-off-by: Julien Grall <julien.grall@xxxxxxxxxx>
Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---
xen/arch/arm/domain_build.c | 4 ++--
xen/arch/arm/psci.c | 8 +++++++-
xen/include/asm-arm/processor.h | 6 +++++-
3 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index eaf52db..69b4b1d 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -597,7 +597,7 @@ int construct_dom0(struct domain *d)
if ( is_pv32_domain(d) )
{
- regs->cpsr = PSR_GUEST_INIT|PSR_MODE_SVC;
+ regs->cpsr = PSR_GUEST32_INIT;
/* Pretend to be a Cortex A15 */
d->arch.vpidr = 0x410fc0f0;
@@ -619,7 +619,7 @@ int construct_dom0(struct domain *d)
#ifdef CONFIG_ARM_64
else
{
- regs->cpsr = PSR_GUEST_INIT|PSR_MODE_EL1h;
+ regs->cpsr = PSR_GUEST64_INIT;
/* From linux/Documentation/arm64/booting.txt */
regs->x0 = kinfo.dtb_paddr;
regs->x1 = 0; /* Reserved for future use */
diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c
index 200769c..6c3be47 100644
--- a/xen/arch/arm/psci.c
+++ b/xen/arch/arm/psci.c
@@ -47,7 +47,13 @@ int do_psci_cpu_on(uint32_t vcpuid, register_t entry_point)
ctxt->ttbr0 = 0;
ctxt->ttbr1 = 0;
ctxt->ttbcr = 0; /* Defined Reset Value */
- ctxt->user_regs.cpsr = PSR_GUEST_INIT;
+ if ( is_pv32_domain(d) )
+ ctxt->user_regs.cpsr = PSR_GUEST32_INIT;
+#ifdef CONFIG_ARM_64
+ else
+ ctxt->user_regs.cpsr = PSR_GUEST64_INIT;
+#endif
+
/* Start the VCPU with THUMB set if it's requested by the kernel */
if ( is_thumb )
ctxt->user_regs.cpsr |= PSR_THUMB;
diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 948bf2d..06b0b25 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -47,7 +47,11 @@
#define SCTLR_BASE 0x00c50078
#define HSCTLR_BASE 0x30c51878
-#define PSR_GUEST_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK)
+#define PSR_GUEST32_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC)
+
+#ifdef CONFIG_ARM_64
+#define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
+#endif
/* HCR Hyp Configuration Register */
#define HCR_RW (1<<31) /* Register Width, ARM64 only */
--
generated by git-patchbot for /home/xen/git/xen.git#master
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