[Xen-changelog] [xen stable-4.1] iommu/amd: Workaround for erratum 787

[patchbot@xxxxxxx]

commit 625adff3a665e0edcce6fc96b269379263f4ff6d
Author:     Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>
AuthorDate: Thu Jul 11 15:10:23 2013 +0200
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Thu Jul 11 15:10:23 2013 +0200

    iommu/amd: Workaround for erratum 787
    
    The IOMMU interrupt handling in bottom half must clear the PPR log interrupt
    and event log interrupt bits to re-enable the interrupt. This is done by
    writing 1 to the memory mapped register to clear the bit. Due to hardware 
bug,
    if the driver tries to clear this bit while the IOMMU hardware also setting
    this bit, the conflict will result with the bit being set. If the interrupt
    handling code does not make sure to clear this bit, subsequent changes in 
the
    event/PPR logs will no longer generating interrupts, and would result if
    buffer overflow. After clearing the bits, the driver must read back
    the register to verify.
    
    Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>
    
    Adjust to apply on top of heavily modified patch 1. Adjust flow to get away
    with a single readl() in each instance of the status register checks.
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Tim Deegan <tim@xxxxxxx>
    Acked-by: Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>
    master commit: 9eabb0735400e2b6059dfa3f0b47a426f61f570a
    master date: 2013-07-02 08:50:41 +0200
---
 xen/drivers/passthrough/amd/iommu_init.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/xen/drivers/passthrough/amd/iommu_init.c 
b/xen/drivers/passthrough/amd/iommu_init.c
index b87b613..d105e35 100644
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -593,6 +593,14 @@ static void do_amd_iommu_irq(unsigned long data)
             }
         }
 
+        /*
+         * Workaround for erratum787:
+         * Re-check to make sure the bit has been cleared.
+         */
+        entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+        if ( entry & IOMMU_STATUS_EVENT_LOG_INT_MASK )
+            tasklet_schedule(&amd_iommu_irq_tasklet);
+
         spin_unlock_irqrestore(&iommu->lock, flags);
     }
 }
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.1

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