[Xen-changelog] [xen-unstable] xen/arm: introduce flush_xen_data_tlb_range_va

[Xen patchbot-unstable <patchbot@xxxxxxx>]

# HG changeset patch
# User Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
# Date 1359031669 0
# Node ID cc4c1e0ecbaf02887efb5a35ccbd6e377938cb28
# Parent  50c72c52473d3eaad9a5534f8a4257b7dfae2c2c
xen/arm: introduce flush_xen_data_tlb_range_va

Add flush_xen_data_tlb_range_va, that flushes a range of virtual addresses.
Replace all the calls to flush_xen_data_tlb_va with calls to
flush_xen_data_tlb_range_va and remove flush_xen_data_tlb_va.

Signed-off-by: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
Committed-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---


diff -r 50c72c52473d -r cc4c1e0ecbaf xen/arch/arm/mm.c
--- a/xen/arch/arm/mm.c Thu Jan 24 12:47:48 2013 +0000
+++ b/xen/arch/arm/mm.c Thu Jan 24 12:47:49 2013 +0000
@@ -114,7 +114,7 @@ void set_fixmap(unsigned map, unsigned l
     pte.pt.ai = attributes;
     pte.pt.xn = 1;
     write_pte(xen_fixmap + third_table_offset(FIXMAP_ADDR(map)), pte);
-    flush_xen_data_tlb_va(FIXMAP_ADDR(map));
+    flush_xen_data_tlb_range_va(FIXMAP_ADDR(map), PAGE_SIZE);
 }
 
 /* Remove a mapping from a fixmap entry */
@@ -122,7 +122,7 @@ void clear_fixmap(unsigned map)
 {
     lpae_t pte = {0};
     write_pte(xen_fixmap + third_table_offset(FIXMAP_ADDR(map)), pte);
-    flush_xen_data_tlb_va(FIXMAP_ADDR(map));
+    flush_xen_data_tlb_range_va(FIXMAP_ADDR(map), PAGE_SIZE);
 }
 
 /* Map a page of domheap memory */
@@ -186,7 +186,7 @@ void *map_domain_page(unsigned long mfn)
      * We may not have flushed this specific subpage at map time,
      * since we only flush the 4k page not the superpage
      */
-    flush_xen_data_tlb_va(va);
+    flush_xen_data_tlb_range_va(va, PAGE_SIZE);
 
     return (void *)va;
 }
@@ -246,7 +246,7 @@ void __init setup_pagetables(unsigned lo
     dest_va = BOOT_MISC_VIRT_START;
     pte = mfn_to_xen_entry(xen_paddr >> PAGE_SHIFT);
     write_pte(xen_second + second_table_offset(dest_va), pte);
-    flush_xen_data_tlb_va(dest_va);
+    flush_xen_data_tlb_range_va(dest_va, PAGE_SIZE);
 
     /* Calculate virt-to-phys offset for the new location */
     phys_offset = xen_paddr - (unsigned long) _start;
diff -r 50c72c52473d -r cc4c1e0ecbaf xen/include/asm-arm/page.h
--- a/xen/include/asm-arm/page.h        Thu Jan 24 12:47:48 2013 +0000
+++ b/xen/include/asm-arm/page.h        Thu Jan 24 12:47:49 2013 +0000
@@ -316,16 +316,20 @@ static inline void flush_xen_data_tlb(vo
 }
 
 /*
- * Flush one VA's hypervisor mappings from the data TLB. This is not
+ * Flush a range of VA's hypervisor mappings from the data TLB. This is not
  * sufficient when changing code mappings or for self modifying code.
  */
-static inline void flush_xen_data_tlb_va(unsigned long va)
+static inline void flush_xen_data_tlb_range_va(unsigned long va, unsigned long 
size)
 {
-    asm volatile("dsb;" /* Ensure preceding are visible */
-                 STORE_CP32(0, TLBIMVAH)
-                 "dsb;" /* Ensure completion of the TLB flush */
-                 "isb;"
-                 : : "r" (va) : "memory");
+    unsigned long end = va + size;
+    dsb(); /* Ensure preceding are visible */
+    while ( va < end ) {
+        asm volatile(STORE_CP32(0, TLBIMVAH)
+                     : : "r" (va) : "memory");
+        va += PAGE_SIZE;
+    }
+    dsb(); /* Ensure completion of the TLB flush */
+    isb();
 }
 
 /* Flush all non-hypervisor mappings from the TLB */

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