[Xen-changelog] [xen-4.1-testing] IOMMU/ATS: fix maximum queue depth calculation

[Xen patchbot-4.1-testing <patchbot@xxxxxxx>]

# HG changeset patch
# User Jan Beulich <jbeulich@xxxxxxxx>
# Date 1357636952 -3600
# Node ID 54df833dd82f49889421551646a3ae8d95bb217e
# Parent  2e0a6f43218220f2b293bed979a6aa1e79a53b8d
IOMMU/ATS: fix maximum queue depth calculation

The capabilities register field is a 5-bit value, and the 5 bits all
being zero actually means 32 entries.

Under the assumption that amd_iommu_flush_iotlb() really just tried
to correct for the miscalculation above when adding 32 to the value,
that adjustment is also being removed.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
Acked-by Xiantao Zhang <xiantao.zhang@xxxxxxxxx>
Acked-by: Wei Huang <wei.huang2@xxxxxxx>
xen-unstable changeset: 26235:670b07e8d738
xen-unstable date: Wed Dec  5 08:52:14 UTC 2012
---


diff -r 2e0a6f432182 -r 54df833dd82f xen/drivers/passthrough/vtd/x86/ats.c
--- a/xen/drivers/passthrough/vtd/x86/ats.c     Tue Jan 08 10:18:59 2013 +0100
+++ b/xen/drivers/passthrough/vtd/x86/ats.c     Tue Jan 08 10:22:32 2013 +0100
@@ -32,7 +32,7 @@ static LIST_HEAD(ats_dev_drhd_units);
 
 #define ATS_REG_CAP    4
 #define ATS_REG_CTL    6
-#define ATS_QUEUE_DEPTH_MASK     0xF
+#define ATS_QUEUE_DEPTH_MASK     0x1f
 #define ATS_ENABLE               (1<<15)
 
 struct pci_ats_dev {
@@ -178,7 +178,8 @@ int enable_ats_device(int seg, int bus, 
         pdev->devfn = devfn;
         value = pci_conf_read16(bus, PCI_SLOT(devfn),
                                 PCI_FUNC(devfn), pos + ATS_REG_CAP);
-        pdev->ats_queue_depth = value & ATS_QUEUE_DEPTH_MASK;
+        pdev->ats_queue_depth = value & ATS_QUEUE_DEPTH_MASK ?:
+                                ATS_QUEUE_DEPTH_MASK + 1;
         list_add(&pdev->list, &ats_devices);
     }
 

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