[Xen-changelog] [xen-unstable] xen: arm: reorder registers in struct cpu_user_regs.

[Xen patchbot-unstable <patchbot@xxxxxxx>]

# HG changeset patch
# User Ian Campbell <ian.campbell@xxxxxxxxxx>
# Date 1355926589 0
# Node ID 984086ca8ca0de17b5cd3253bc9579d072ec43bc
# Parent  fe36080ff85f727fd0de87a8fd264892d41b8c9c
xen: arm: reorder registers in struct cpu_user_regs.

Primarily this is so that they are ordered in the same way as the
mapping from arm64 x0..x31 registers to the arm32 registers, which is
just less confusing for everyone going forward.

It also makes the implementation of select_user_regs in the next patch
slightly simpler.

Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
Acked-by: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
Committed-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---


diff -r fe36080ff85f -r 984086ca8ca0 xen/arch/arm/entry.S
--- a/xen/arch/arm/entry.S      Wed Dec 19 14:16:28 2012 +0000
+++ b/xen/arch/arm/entry.S      Wed Dec 19 14:16:29 2012 +0000
@@ -12,7 +12,7 @@
         RESTORE_ONE_BANKED(SP_##mode) ; RESTORE_ONE_BANKED(LR_##mode) ; 
RESTORE_ONE_BANKED(SPSR_##mode)
 
 #define SAVE_ALL                                                        \
-        sub sp, #(UREGS_R8_fiq - UREGS_sp); /* SP, LR, SPSR, PC */      \
+        sub sp, #(UREGS_SP_usr - UREGS_sp); /* SP, LR, SPSR, PC */      \
         push {r0-r12}; /* Save R0-R12 */                                \
                                                                         \
         mrs r11, ELR_hyp;               /* ELR_hyp is return address. */\
@@ -115,7 +115,7 @@ ENTRY(return_to_hypervisor)
         ldr r11, [sp, #UREGS_cpsr]
         msr SPSR_hyp, r11
         pop {r0-r12}
-        add sp, #(UREGS_R8_fiq - UREGS_sp); /* SP, LR, SPSR, PC */
+        add sp, #(UREGS_SP_usr - UREGS_sp); /* SP, LR, SPSR, PC */
         eret
 
 /*
diff -r fe36080ff85f -r 984086ca8ca0 xen/arch/arm/io.h
--- a/xen/arch/arm/io.h Wed Dec 19 14:16:28 2012 +0000
+++ b/xen/arch/arm/io.h Wed Dec 19 14:16:29 2012 +0000
@@ -21,6 +21,7 @@
 
 #include <xen/lib.h>
 #include <asm/processor.h>
+#include <asm/regs.h>
 
 typedef struct
 {
diff -r fe36080ff85f -r 984086ca8ca0 xen/arch/arm/traps.c
--- a/xen/arch/arm/traps.c      Wed Dec 19 14:16:28 2012 +0000
+++ b/xen/arch/arm/traps.c      Wed Dec 19 14:16:29 2012 +0000
@@ -43,7 +43,7 @@
  * stack) must be doubleword-aligned in size.  */
 static inline void check_stack_alignment_constraints(void) {
     BUILD_BUG_ON((sizeof (struct cpu_user_regs)) & 0x7);
-    BUILD_BUG_ON((offsetof(struct cpu_user_regs, r8_fiq)) & 0x7);
+    BUILD_BUG_ON((offsetof(struct cpu_user_regs, sp_usr)) & 0x7);
     BUILD_BUG_ON((sizeof (struct cpu_info)) & 0x7);
 }
 
diff -r fe36080ff85f -r 984086ca8ca0 xen/include/public/arch-arm.h
--- a/xen/include/public/arch-arm.h     Wed Dec 19 14:16:28 2012 +0000
+++ b/xen/include/public/arch-arm.h     Wed Dec 19 14:16:29 2012 +0000
@@ -119,12 +119,15 @@ struct cpu_user_regs
 
     /* Outer guest frame only from here on... */
 
-    uint32_t r8_fiq, r9_fiq, r10_fiq, r11_fiq, r12_fiq;
-
     uint32_t sp_usr; /* LR_usr is the same register as LR, see above */
 
-    uint32_t sp_svc, sp_abt, sp_und, sp_irq, sp_fiq;
-    uint32_t lr_svc, lr_abt, lr_und, lr_irq, lr_fiq;
+    uint32_t sp_irq, lr_irq;
+    uint32_t sp_svc, lr_svc;
+    uint32_t sp_abt, lr_abt;
+    uint32_t sp_und, lr_und;
+
+    uint32_t r8_fiq, r9_fiq, r10_fiq, r11_fiq, r12_fiq;
+    uint32_t sp_fiq, lr_fiq;
 
     uint32_t spsr_svc, spsr_abt, spsr_und, spsr_irq, spsr_fiq;
 

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