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[Xen-changelog] [xen-unstable] xen/arm: protect LR registers and lr_mask changes with spin_lock_irq


  • To: xen-changelog@xxxxxxxxxxxxxxxxxxx
  • From: Xen patchbot-unstable <patchbot@xxxxxxx>
  • Date: Wed, 10 Oct 2012 22:11:24 +0000
  • Delivery-date: Wed, 10 Oct 2012 22:11:34 +0000
  • List-id: "Change log for Mercurial \(receive only\)" <xen-changelog.lists.xen.org>

# HG changeset patch
# User Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
# Date 1349791537 -3600
# Node ID 3dc453705b8810a2de95ae03cfda8576169c2ead
# Parent  c5cb51bde9f05ae81f40d81647dc449981214979
xen/arm: protect LR registers and lr_mask changes with spin_lock_irq

GICH_LR registers and lr_mask need to be kept in sync: make sure that
their modifications are protected by spin_lock_irq(&gic.lock).

Signed-off-by: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
Committed-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---


diff -r c5cb51bde9f0 -r 3dc453705b88 xen/arch/arm/gic.c
--- a/xen/arch/arm/gic.c        Tue Oct 09 15:05:36 2012 +0100
+++ b/xen/arch/arm/gic.c        Tue Oct 09 15:05:37 2012 +0100
@@ -57,9 +57,11 @@ void gic_save_state(struct vcpu *v)
 {
     int i;
 
+    spin_lock_irq(&gic.lock);
     for ( i=0; i<nr_lrs; i++)
         v->arch.gic_lr[i] = GICH[GICH_LR + i];
     v->arch.lr_mask = gic.lr_mask;
+    spin_unlock_irq(&gic.lock);
     /* Disable until next VCPU scheduled */
     GICH[GICH_HCR] = 0;
     isb();
@@ -72,9 +74,11 @@ void gic_restore_state(struct vcpu *v)
     if ( is_idle_vcpu(v) )
         return;
 
+    spin_lock_irq(&gic.lock);
     gic.lr_mask = v->arch.lr_mask;
     for ( i=0; i<nr_lrs; i++)
         GICH[GICH_LR + i] = v->arch.gic_lr[i];
+    spin_unlock_irq(&gic.lock);
     GICH[GICH_HCR] = GICH_HCR_EN;
     isb();
 
@@ -469,9 +473,11 @@ static void gic_restore_pending_irqs(str
         i = find_first_zero_bit(&gic.lr_mask, nr_lrs);
         if ( i >= nr_lrs ) return;
 
+        spin_lock_irq(&gic.lock);
         gic_set_lr(i, p->irq, GICH_LR_PENDING, p->priority);
         list_del_init(&p->lr_queue);
         set_bit(i, &gic.lr_mask);
+        spin_unlock_irq(&gic.lock);
     }
 
 }

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