[Xen-changelog] [xen-unstable] x86: Use deep C states for off-lined CPUs

[Xen patchbot-unstable <patchbot@xxxxxxx>]

# HG changeset patch
# User Boris Ostrovsky <boris.ostrovsky@xxxxxxx>
# Date 1331045493 -3600
# Node ID 8964c223836c2889364aa75cb1a662ff5eacd5d8
# Parent  33659563f5897b3dabc93284252f8570ed825e63
x86: Use deep C states for off-lined CPUs

Currently when a core is taken off-line it is placed in C1 state (unless
MONITOR/MWAIT is used). This patch allows a core to go to deeper C states
resulting in significantly higher power savings.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxx>
Committed-by: Jan Beulich <jbeulich@xxxxxxxx>
---


diff -r 33659563f589 -r 8964c223836c xen/arch/x86/acpi/cpu_idle.c
--- a/xen/arch/x86/acpi/cpu_idle.c      Fri Mar 02 12:33:25 2012 +0000
+++ b/xen/arch/x86/acpi/cpu_idle.c      Tue Mar 06 15:51:33 2012 +0100
@@ -602,6 +602,23 @@
             __mwait(cx->address, 0);
         }
     }
+    else if ( current_cpu_data.x86_vendor == X86_VENDOR_AMD &&
+              cx->entry_method == ACPI_CSTATE_EM_SYSIO )
+    {
+        /* Intel prefers not to use SYSIO */
+
+        /* Avoid references to shared data after the cache flush */
+        u32 address = cx->address;
+        u32 pmtmr_ioport_local = pmtmr_ioport;
+
+        wbinvd();
+
+        while ( 1 )
+        {
+            inb(address);
+            inl(pmtmr_ioport_local);
+        }
+    }
 
 default_halt:
     for ( ; ; )

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