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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] x86: Intel EPT entry structure changes.
# HG changeset patch
# User Keir Fraser <keir.fraser@xxxxxxxxxx>
# Date 1265274273 0
# Node ID 9fc37faa25a0f816776b968899469aa49ff4a553
# Parent 845d04d505d069fc0fec09c95e9dcc7911d41a15
x86: Intel EPT entry structure changes.
- Intel SDM defines bit6 in EPT page table entry as "Ignore PAT
memory type", so change the abbreviation from "igmt" to "ipat".
- Change the mfn and avail2 fields according to SDM definition.
Signed-off-by: Dongxiao Xu <dongxiao.xu@xxxxxxxxx>
---
xen/arch/x86/hvm/mtrr.c | 8 ++++----
xen/arch/x86/mm/hap/p2m-ept.c | 35 ++++++++++++++++-------------------
xen/include/asm-x86/hvm/vmx/vmx.h | 7 +++----
xen/include/asm-x86/mtrr.h | 2 +-
4 files changed, 24 insertions(+), 28 deletions(-)
diff -r 845d04d505d0 -r 9fc37faa25a0 xen/arch/x86/hvm/mtrr.c
--- a/xen/arch/x86/hvm/mtrr.c Thu Feb 04 09:03:42 2010 +0000
+++ b/xen/arch/x86/hvm/mtrr.c Thu Feb 04 09:04:33 2010 +0000
@@ -707,13 +707,13 @@ HVM_REGISTER_SAVE_RESTORE(MTRR, hvm_save
1, HVMSR_PER_VCPU);
uint8_t epte_get_entry_emt(struct domain *d, unsigned long gfn, mfn_t mfn,
- uint8_t *igmt, int direct_mmio)
+ uint8_t *ipat, int direct_mmio)
{
uint8_t gmtrr_mtype, hmtrr_mtype;
uint32_t type;
struct vcpu *v = current;
- *igmt = 0;
+ *ipat = 0;
if ( (current->domain != d) &&
((d->vcpu == NULL) || ((v = d->vcpu[0]) == NULL)) )
@@ -733,7 +733,7 @@ uint8_t epte_get_entry_emt(struct domain
if ( !iommu_enabled )
{
- *igmt = 1;
+ *ipat = 1;
return MTRR_TYPE_WRBACK;
}
@@ -742,7 +742,7 @@ uint8_t epte_get_entry_emt(struct domain
if ( iommu_snoop )
{
- *igmt = 1;
+ *ipat = 1;
return MTRR_TYPE_WRBACK;
}
diff -r 845d04d505d0 -r 9fc37faa25a0 xen/arch/x86/mm/hap/p2m-ept.c
--- a/xen/arch/x86/mm/hap/p2m-ept.c Thu Feb 04 09:03:42 2010 +0000
+++ b/xen/arch/x86/mm/hap/p2m-ept.c Thu Feb 04 09:04:33 2010 +0000
@@ -105,11 +105,10 @@ static int ept_set_middle_entry(struct d
page_list_add_tail(pg, &d->arch.p2m->pages);
ept_entry->emt = 0;
- ept_entry->igmt = 0;
+ ept_entry->ipat = 0;
ept_entry->sp_avail = 0;
ept_entry->avail1 = 0;
ept_entry->mfn = page_to_mfn(pg);
- ept_entry->rsvd = 0;
ept_entry->avail2 = 0;
ept_entry->r = ept_entry->w = ept_entry->x = 1;
@@ -186,7 +185,7 @@ ept_set_entry(struct domain *d, unsigned
int ret = 0;
int walk_level = order / EPT_TABLE_ORDER;
int direct_mmio = (p2mt == p2m_mmio_direct);
- uint8_t igmt = 0;
+ uint8_t ipat = 0;
int need_modify_vtd_table = 1;
/* We only support 4k and 2m pages now */
@@ -227,9 +226,9 @@ ept_set_entry(struct domain *d, unsigned
if ( mfn_valid(mfn_x(mfn)) || direct_mmio || p2m_is_paged(p2mt) ||
(p2mt == p2m_ram_paging_in_start) )
{
- ept_entry->emt = epte_get_entry_emt(d, gfn, mfn, &igmt,
+ ept_entry->emt = epte_get_entry_emt(d, gfn, mfn, &ipat,
direct_mmio);
- ept_entry->igmt = igmt;
+ ept_entry->ipat = ipat;
ept_entry->sp_avail = order ? 1 : 0;
if ( ret == GUEST_TABLE_SUPER_PAGE )
@@ -253,7 +252,6 @@ ept_set_entry(struct domain *d, unsigned
}
ept_entry->avail1 = p2mt;
- ept_entry->rsvd = 0;
ept_entry->avail2 = 0;
ept_p2m_type_to_flags(ept_entry, p2mt);
@@ -292,8 +290,8 @@ ept_set_entry(struct domain *d, unsigned
split_ept_entry = split_table + i;
split_ept_entry->emt = epte_get_entry_emt(d, gfn - offset + i,
_mfn(super_mfn + i),
- &igmt, direct_mmio);
- split_ept_entry->igmt = igmt;
+ &ipat, direct_mmio);
+ split_ept_entry->ipat = ipat;
split_ept_entry->sp_avail = 0;
/* Don't increment mfn if it's a PoD mfn */
if ( super_p2mt != p2m_populate_on_demand )
@@ -301,7 +299,6 @@ ept_set_entry(struct domain *d, unsigned
else
split_ept_entry->mfn = super_mfn;
split_ept_entry->avail1 = super_p2mt;
- split_ept_entry->rsvd = 0;
split_ept_entry->avail2 = 0;
ept_p2m_type_to_flags(split_ept_entry, super_p2mt);
@@ -309,9 +306,9 @@ ept_set_entry(struct domain *d, unsigned
/* Set the destinated 4k page as normal */
split_ept_entry = split_table + offset;
- split_ept_entry->emt = epte_get_entry_emt(d, gfn, mfn, &igmt,
+ split_ept_entry->emt = epte_get_entry_emt(d, gfn, mfn, &ipat,
direct_mmio);
- split_ept_entry->igmt = igmt;
+ split_ept_entry->ipat = ipat;
if ( split_ept_entry->mfn == mfn_x(mfn) )
need_modify_vtd_table = 0;
@@ -556,16 +553,16 @@ static mfn_t ept_get_entry_current(unsig
* return 1 to not to reset ept entry.
*/
static int need_modify_ept_entry(struct domain *d, unsigned long gfn,
- mfn_t mfn, uint8_t o_igmt, uint8_t o_emt,
+ mfn_t mfn, uint8_t o_ipat, uint8_t o_emt,
p2m_type_t p2mt)
{
- uint8_t igmt;
+ uint8_t ipat;
uint8_t emt;
int direct_mmio = (p2mt == p2m_mmio_direct);
- emt = epte_get_entry_emt(d, gfn, mfn, &igmt, direct_mmio);
-
- if ( (emt == o_emt) && (igmt == o_igmt) )
+ emt = epte_get_entry_emt(d, gfn, mfn, &ipat, direct_mmio);
+
+ if ( (emt == o_emt) && (ipat == o_ipat) )
return 0;
return 1;
@@ -599,21 +596,21 @@ void ept_change_entry_emt_with_range(str
* Set emt for super page.
*/
order = EPT_TABLE_ORDER;
- if ( need_modify_ept_entry(d, gfn, mfn, e.igmt, e.emt,
e.avail1) )
+ if ( need_modify_ept_entry(d, gfn, mfn, e.ipat, e.emt,
e.avail1) )
ept_set_entry(d, gfn, mfn, order, e.avail1);
gfn += 0x1FF;
}
else
{
/* Change emt for partial entries of the 2m area. */
- if ( need_modify_ept_entry(d, gfn, mfn, e.igmt, e.emt,
e.avail1) )
+ if ( need_modify_ept_entry(d, gfn, mfn, e.ipat, e.emt,
e.avail1) )
ept_set_entry(d, gfn, mfn, order, e.avail1);
gfn = ((gfn >> EPT_TABLE_ORDER) << EPT_TABLE_ORDER) + 0x1FF;
}
}
else /* gfn assigned with 4k */
{
- if ( need_modify_ept_entry(d, gfn, mfn, e.igmt, e.emt, e.avail1) )
+ if ( need_modify_ept_entry(d, gfn, mfn, e.ipat, e.emt, e.avail1) )
ept_set_entry(d, gfn, mfn, order, e.avail1);
}
}
diff -r 845d04d505d0 -r 9fc37faa25a0 xen/include/asm-x86/hvm/vmx/vmx.h
--- a/xen/include/asm-x86/hvm/vmx/vmx.h Thu Feb 04 09:03:42 2010 +0000
+++ b/xen/include/asm-x86/hvm/vmx/vmx.h Thu Feb 04 09:04:33 2010 +0000
@@ -34,12 +34,11 @@ typedef union {
w : 1,
x : 1,
emt : 3, /* EPT Memory type */
- igmt : 1, /* Ignore MTRR memory type */
+ ipat : 1, /* Ignore PAT memory type */
sp_avail : 1, /* Is this a superpage? */
avail1 : 4,
- mfn : 45,
- rsvd : 5,
- avail2 : 2;
+ mfn : 40,
+ avail2 : 12;
};
u64 epte;
} ept_entry_t;
diff -r 845d04d505d0 -r 9fc37faa25a0 xen/include/asm-x86/mtrr.h
--- a/xen/include/asm-x86/mtrr.h Thu Feb 04 09:03:42 2010 +0000
+++ b/xen/include/asm-x86/mtrr.h Thu Feb 04 09:04:33 2010 +0000
@@ -67,7 +67,7 @@ extern u32 get_pat_flags(struct vcpu *v,
extern u32 get_pat_flags(struct vcpu *v, u32 gl1e_flags, paddr_t gpaddr,
paddr_t spaddr, uint8_t gmtrr_mtype);
extern uint8_t epte_get_entry_emt(struct domain *d, unsigned long gfn,
- mfn_t mfn, uint8_t *igmt, int direct_mmio);
+ mfn_t mfn, uint8_t *ipat, int direct_mmio);
extern void ept_change_entry_emt_with_range(
struct domain *d, unsigned long start_gfn, unsigned long end_gfn);
extern unsigned char pat_type_2_pte_flags(unsigned char pat_type);
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