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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] [HVM] VLAPIC cleanups. vlapic tsruct is statically contained
# HG changeset patch
# User kfraser@xxxxxxxxxxxxxxxxxxxxx
# Node ID 9fbb26d47b8397681de6c910540f4ab0835ca787
# Parent 9a6fb3e2f12d17e4b8cf58cd8755135e161562d6
[HVM] VLAPIC cleanups. vlapic tsruct is statically contained
inside the vcpu structure.
Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx>
---
xen/arch/x86/hvm/svm/svm.c | 17 ++---
xen/arch/x86/hvm/vioapic.c | 5 -
xen/arch/x86/hvm/vlapic.c | 116 +++++++++++++--------------------------
xen/arch/x86/hvm/vmx/io.c | 4 -
xen/arch/x86/hvm/vmx/vmx.c | 21 ++-----
xen/include/asm-x86/hvm/vcpu.h | 2
xen/include/asm-x86/hvm/vlapic.h | 7 +-
7 files changed, 64 insertions(+), 108 deletions(-)
diff -r 9a6fb3e2f12d -r 9fbb26d47b83 xen/arch/x86/hvm/svm/svm.c
--- a/xen/arch/x86/hvm/svm/svm.c Tue Nov 07 13:13:52 2006 +0000
+++ b/xen/arch/x86/hvm/svm/svm.c Tue Nov 07 15:48:10 2006 +0000
@@ -855,8 +855,7 @@ static void svm_migrate_timers(struct vc
migrate_timer(&pt->timer, v->processor);
migrate_timer(&v->arch.hvm_vcpu.hlt_timer, v->processor);
}
- if ( VLAPIC(v) != NULL )
- migrate_timer(&VLAPIC(v)->vlapic_timer, v->processor);
+ migrate_timer(&vcpu_vlapic(v)->vlapic_timer, v->processor);
migrate_timer(&vrtc->second_timer, v->processor);
migrate_timer(&vrtc->second_timer2, v->processor);
migrate_timer(&vpmt->timer, v->processor);
@@ -984,7 +983,7 @@ static void svm_vmexit_do_cpuid(struct v
cpuid(input, &eax, &ebx, &ecx, &edx);
if (input == 0x00000001 || input == 0x80000001 )
{
- if ( !vlapic_global_enabled((VLAPIC(v))) )
+ if ( !vlapic_global_enabled(vcpu_vlapic(v)) )
{
/* Since the apic is disabled, avoid any confusion
about SMP cpus being available */
@@ -1550,7 +1549,7 @@ static void mov_from_cr(int cr, int gp,
{
unsigned long value = 0;
struct vcpu *v = current;
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
struct vmcb_struct *vmcb;
vmcb = v->arch.hvm_svm.vmcb;
@@ -1577,8 +1576,6 @@ static void mov_from_cr(int cr, int gp,
printk("CR4 read=%lx\n", value);
break;
case 8:
- if ( vlapic == NULL )
- break;
value = (unsigned long)vlapic_get_reg(vlapic, APIC_TASKPRI);
value = (value & 0xF0) >> 4;
break;
@@ -1607,7 +1604,7 @@ static int mov_to_cr(int gpreg, int cr,
unsigned long value;
unsigned long old_cr;
struct vcpu *v = current;
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
struct vmcb_struct *vmcb = v->arch.hvm_svm.vmcb;
ASSERT(vmcb);
@@ -1747,8 +1744,6 @@ static int mov_to_cr(int gpreg, int cr,
case 8:
{
- if ( vlapic == NULL )
- break;
vlapic_set_reg(vlapic, APIC_TASKPRI, ((value & 0x0F) << 4));
break;
}
@@ -1907,7 +1902,7 @@ static inline void svm_do_msr_access(
msr_content = vmcb->sysenter_eip;
break;
case MSR_IA32_APICBASE:
- msr_content = VLAPIC(v) ? VLAPIC(v)->apic_base_msr : 0;
+ msr_content = vcpu_vlapic(v)->apic_base_msr;
break;
default:
if (long_mode_do_msr_read(regs))
@@ -1946,7 +1941,7 @@ static inline void svm_do_msr_access(
vmcb->sysenter_eip = msr_content;
break;
case MSR_IA32_APICBASE:
- vlapic_msr_set(VLAPIC(v), msr_content);
+ vlapic_msr_set(vcpu_vlapic(v), msr_content);
break;
default:
if ( !long_mode_do_msr_write(regs) )
diff -r 9a6fb3e2f12d -r 9fbb26d47b83 xen/arch/x86/hvm/vioapic.c
--- a/xen/arch/x86/hvm/vioapic.c Tue Nov 07 13:13:52 2006 +0000
+++ b/xen/arch/x86/hvm/vioapic.c Tue Nov 07 15:48:10 2006 +0000
@@ -430,7 +430,6 @@ static void ioapic_deliver(hvm_vioapic_t
uint32_t deliver_bitmask;
struct vlapic *target;
-
HVM_DBG_LOG(DBG_LEVEL_IOAPIC,
"dest %x dest_mode %x delivery_mode %x vector %x trig_mode %x\n",
dest, dest_mode, delivery_mode, vector, trig_mode);
@@ -458,7 +457,7 @@ static void ioapic_deliver(hvm_vioapic_t
vector, deliver_bitmask);
if (target) {
ioapic_inj_irq(s, target, vector, trig_mode, delivery_mode);
- vcpu_kick(target->vcpu);
+ vcpu_kick(vlapic_vcpu(target));
} else
HVM_DBG_LOG(DBG_LEVEL_IOAPIC,
"null round robin mask %x vector %x delivery_mode %x\n",
@@ -482,7 +481,7 @@ static void ioapic_deliver(hvm_vioapic_t
target = s->lapic_info[bit];
if (target) {
ioapic_inj_irq(s, target, vector, trig_mode, delivery_mode);
- vcpu_kick(target->vcpu);
+ vcpu_kick(vlapic_vcpu(target));
}
}
break;
diff -r 9a6fb3e2f12d -r 9fbb26d47b83 xen/arch/x86/hvm/vlapic.c
--- a/xen/arch/x86/hvm/vlapic.c Tue Nov 07 13:13:52 2006 +0000
+++ b/xen/arch/x86/hvm/vlapic.c Tue Nov 07 15:48:10 2006 +0000
@@ -157,7 +157,7 @@ int vlapic_set_irq(struct vlapic *vlapic
s_time_t get_apictime_scheduled(struct vcpu *v)
{
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
if ( !vlapic_lvt_enabled(vlapic, APIC_LVTT) )
return -1;
@@ -202,7 +202,7 @@ static int vlapic_match_dest(struct vcpu
int delivery_mode)
{
int result = 0;
- struct vlapic *target = VLAPIC(v);
+ struct vlapic *target = vcpu_vlapic(v);
HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "target %p, source %p, dest 0x%x, "
"dest_mode 0x%x, short_hand 0x%x, delivery_mode 0x%x.",
@@ -285,7 +285,7 @@ static int vlapic_accept_irq(struct vcpu
int vector, int level, int trig_mode)
{
int result = 0;
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
switch ( delivery_mode ) {
case APIC_DM_FIXED:
@@ -404,8 +404,7 @@ struct vlapic *apic_round_robin(struct d
if ( test_bit(next, &bitmap) )
{
- target = d->vcpu[next]->arch.hvm_vcpu.vlapic;
-
+ target = vcpu_vlapic(d->vcpu[next]);
if ( target == NULL || !vlapic_enabled(target) )
{
printk("warning: targe round robin local apic disabled\n");
@@ -433,7 +432,7 @@ void vlapic_EOI_set(struct vlapic *vlapi
vlapic_clear_vector(vector, vlapic->regs + APIC_ISR);
if ( vlapic_test_and_clear_vector(vector, vlapic->regs + APIC_TMR) )
- ioapic_update_EOI(vlapic->domain, vector);
+ ioapic_update_EOI(vlapic_domain(vlapic), vector);
}
static void vlapic_ipi(struct vlapic *vlapic)
@@ -446,12 +445,12 @@ static void vlapic_ipi(struct vlapic *vl
unsigned int trig_mode = icr_low & APIC_INT_LEVELTRIG;
unsigned int level = icr_low & APIC_INT_ASSERT;
unsigned int dest_mode = icr_low & APIC_DEST_MASK;
- unsigned int delivery_mode = icr_low & APIC_MODE_MASK;
+ unsigned int delivery_mode =icr_low & APIC_MODE_MASK;
unsigned int vector = icr_low & APIC_VECTOR_MASK;
struct vlapic *target;
- struct vcpu *v = NULL;
- uint32_t lpr_map=0;
+ struct vcpu *v;
+ uint32_t lpr_map = 0;
HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "icr_high 0x%x, icr_low 0x%x, "
"short_hand 0x%x, dest 0x%x, trig_mode 0x%x, level 0x%x, "
@@ -459,7 +458,7 @@ static void vlapic_ipi(struct vlapic *vl
icr_high, icr_low, short_hand, dest,
trig_mode, level, dest_mode, delivery_mode, vector);
- for_each_vcpu ( vlapic->domain, v )
+ for_each_vcpu ( vlapic_domain(vlapic), v )
{
if ( vlapic_match_dest(v, vlapic, short_hand,
dest, dest_mode, delivery_mode) )
@@ -474,11 +473,10 @@ static void vlapic_ipi(struct vlapic *vl
if ( delivery_mode == APIC_DM_LOWEST)
{
- v = vlapic->vcpu;
- target = apic_round_robin(v->domain, dest_mode, vector, lpr_map);
-
- if ( target )
- vlapic_accept_irq(target->vcpu, delivery_mode,
+ target = apic_round_robin(vlapic_domain(v), dest_mode,
+ vector, lpr_map);
+ if ( target != NULL )
+ vlapic_accept_irq(vlapic_vcpu(target), delivery_mode,
vector, level, trig_mode);
}
}
@@ -488,8 +486,6 @@ static uint32_t vlapic_get_tmcct(struct
uint32_t counter_passed;
s_time_t passed, now = NOW();
uint32_t tmcct = vlapic_get_reg(vlapic, APIC_TMCCT);
-
- ASSERT(vlapic != NULL);
if ( unlikely(now <= vlapic->timer_last_update) )
{
@@ -564,7 +560,7 @@ static unsigned long vlapic_read(struct
unsigned int alignment;
unsigned int tmp;
unsigned long result;
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
unsigned int offset = address - vlapic->base_address;
if ( offset > APIC_TDCR)
@@ -609,7 +605,7 @@ static void vlapic_write(struct vcpu *v,
static void vlapic_write(struct vcpu *v, unsigned long address,
unsigned long len, unsigned long val)
{
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
unsigned int offset = address - vlapic->base_address;
if ( offset != 0xb0 )
@@ -741,7 +737,7 @@ static void vlapic_write(struct vcpu *v,
vlapic_set_reg(vlapic, offset, val);
- if ( !vlapic->vcpu->vcpu_id && (offset == APIC_LVT0) )
+ if ( (vlapic_vcpu(vlapic)->vcpu_id == 0) && (offset == APIC_LVT0) )
{
if ( (val & APIC_MODE_MASK) == APIC_DM_EXTINT )
if ( val & APIC_LVT_MASKED)
@@ -803,7 +799,7 @@ static void vlapic_write(struct vcpu *v,
static int vlapic_range(struct vcpu *v, unsigned long addr)
{
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
return (vlapic_global_enabled(vlapic) &&
(addr >= vlapic->base_address) &&
@@ -818,12 +814,6 @@ struct hvm_mmio_handler vlapic_mmio_hand
void vlapic_msr_set(struct vlapic *vlapic, uint64_t value)
{
- if ( vlapic == NULL )
- return;
-
- if ( vlapic->vcpu->vcpu_id )
- value &= ~MSR_IA32_APICBASE_BSP;
-
vlapic->apic_base_msr = value;
vlapic->base_address = vlapic->apic_base_msr & MSR_IA32_APICBASE_BASE;
@@ -840,7 +830,6 @@ void vlapic_timer_fn(void *data)
void vlapic_timer_fn(void *data)
{
struct vlapic *vlapic = data;
- struct vcpu *v;
uint32_t timer_vector;
s_time_t now;
@@ -848,7 +837,6 @@ void vlapic_timer_fn(void *data)
!vlapic_lvt_enabled(vlapic, APIC_LVTT)) )
return;
- v = vlapic->vcpu;
timer_vector = vlapic_lvt_vector(vlapic, APIC_LVTT);
now = NOW();
@@ -882,14 +870,14 @@ void vlapic_timer_fn(void *data)
int vlapic_accept_pic_intr(struct vcpu *v)
{
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
return vlapic ? test_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status) : 1;
}
int cpu_get_apic_interrupt(struct vcpu *v, int *mode)
{
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
int highest_irr;
if ( !vlapic || !vlapic_enabled(vlapic) )
@@ -923,7 +911,7 @@ int cpu_has_pending_irq(struct vcpu *v)
void vlapic_post_injection(struct vcpu *v, int vector, int deliver_mode)
{
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
if ( unlikely(vlapic == NULL) )
return;
@@ -961,10 +949,8 @@ void vlapic_post_injection(struct vcpu *
static int vlapic_reset(struct vlapic *vlapic)
{
- struct vcpu *v = vlapic->vcpu;
+ struct vcpu *v = vlapic_vcpu(vlapic);
int i;
-
- vlapic->domain = v->domain;
vlapic_set_reg(vlapic, APIC_ID, v->vcpu_id << 24);
@@ -981,29 +967,8 @@ static int vlapic_reset(struct vlapic *v
vlapic->flush_tpr_threshold = 0;
- if ( v->vcpu_id == 0 )
- vlapic->apic_base_msr |= MSR_IA32_APICBASE_BSP;
-
vlapic->base_address = vlapic->apic_base_msr &
MSR_IA32_APICBASE_BASE;
-
- hvm_vioapic_add_lapic(vlapic, v);
-
- init_timer(&vlapic->vlapic_timer,
- vlapic_timer_fn, vlapic, v->processor);
-
-#ifdef VLAPIC_NO_BIOS
- /*
- * XXX According to mp sepcific, BIOS will enable LVT0/1,
- * remove it after BIOS enabled
- */
- if ( !v->vcpu_id )
- {
- vlapic_set_reg(vlapic, APIC_LVT0, APIC_MODE_EXTINT << 8);
- vlapic_set_reg(vlapic, APIC_LVT1, APIC_MODE_NMI << 8);
- set_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status);
- }
-#endif
HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
"vcpu=%p, id=%d, vlapic_apic_base_msr=0x%016"PRIx64", "
@@ -1016,18 +981,9 @@ static int vlapic_reset(struct vlapic *v
int vlapic_init(struct vcpu *v)
{
- struct vlapic *vlapic;
+ struct vlapic *vlapic = vcpu_vlapic(v);
HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "vlapic_init %d", v->vcpu_id);
-
- vlapic = xmalloc_bytes(sizeof(struct vlapic));
- if ( vlapic == NULL )
- {
- printk("malloc vlapic error for vcpu %x\n", v->vcpu_id);
- return -ENOMEM;
- }
-
- memset(vlapic, 0, sizeof(struct vlapic));
vlapic->regs_page = alloc_domheap_page(NULL);
if ( vlapic->regs_page == NULL )
@@ -1040,22 +996,32 @@ int vlapic_init(struct vcpu *v)
vlapic->regs = map_domain_page_global(page_to_mfn(vlapic->regs_page));
memset(vlapic->regs, 0, PAGE_SIZE);
- VLAPIC(v) = vlapic;
- vlapic->vcpu = v;
-
vlapic_reset(vlapic);
+ if ( v->vcpu_id == 0 )
+ vlapic->apic_base_msr |= MSR_IA32_APICBASE_BSP;
+
+ hvm_vioapic_add_lapic(vlapic, v);
+
+ init_timer(&vlapic->vlapic_timer,
+ vlapic_timer_fn, vlapic, v->processor);
+
+#ifdef VLAPIC_NO_BIOS
+ /* According to mp specification, BIOS will enable LVT0/1. */
+ if ( v->vcpu_id == 0 )
+ {
+ vlapic_set_reg(vlapic, APIC_LVT0, APIC_MODE_EXTINT << 8);
+ vlapic_set_reg(vlapic, APIC_LVT1, APIC_MODE_NMI << 8);
+ set_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status);
+ }
+#endif
+
return 0;
}
void vlapic_destroy(struct vcpu *v)
{
- struct vlapic *vlapic = VLAPIC(v);
-
- if ( vlapic == NULL )
- return;
-
- VLAPIC(v) = NULL;
+ struct vlapic *vlapic = vcpu_vlapic(v);
kill_timer(&vlapic->vlapic_timer);
unmap_domain_page_global(vlapic->regs);
diff -r 9a6fb3e2f12d -r 9fbb26d47b83 xen/arch/x86/hvm/vmx/io.c
--- a/xen/arch/x86/hvm/vmx/io.c Tue Nov 07 13:13:52 2006 +0000
+++ b/xen/arch/x86/hvm/vmx/io.c Tue Nov 07 15:48:10 2006 +0000
@@ -96,7 +96,7 @@ asmlinkage void vmx_intr_assist(void)
int highest_vector;
unsigned long eflags;
struct vcpu *v = current;
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
struct hvm_domain *plat=&v->domain->arch.hvm_domain;
struct periodic_time *pt = &plat->pl_time.periodic_tm;
struct hvm_virpic *pic= &plat->vpic;
@@ -117,7 +117,7 @@ asmlinkage void vmx_intr_assist(void)
pic_set_xen_irq(pic, callback_irq, local_events_need_delivery());
}
- if ( vlapic && vlapic_enabled(vlapic) && vlapic->flush_tpr_threshold )
+ if ( vlapic_enabled(vlapic) && vlapic->flush_tpr_threshold )
update_tpr_threshold(vlapic);
has_ext_irq = cpu_has_pending_irq(v);
diff -r 9a6fb3e2f12d -r 9fbb26d47b83 xen/arch/x86/hvm/vmx/vmx.c
--- a/xen/arch/x86/hvm/vmx/vmx.c Tue Nov 07 13:13:52 2006 +0000
+++ b/xen/arch/x86/hvm/vmx/vmx.c Tue Nov 07 15:48:10 2006 +0000
@@ -408,7 +408,7 @@ static void stop_vmx(void)
void vmx_migrate_timers(struct vcpu *v)
{
- struct periodic_time *pt =
&(v->domain->arch.hvm_domain.pl_time.periodic_tm);
+ struct periodic_time *pt = &v->domain->arch.hvm_domain.pl_time.periodic_tm;
struct RTCState *vrtc = &v->domain->arch.hvm_domain.pl_time.vrtc;
struct PMTState *vpmt = &v->domain->arch.hvm_domain.pl_time.vpmt;
@@ -417,8 +417,7 @@ void vmx_migrate_timers(struct vcpu *v)
migrate_timer(&pt->timer, v->processor);
migrate_timer(&v->arch.hvm_vcpu.hlt_timer, v->processor);
}
- if ( VLAPIC(v) != NULL )
- migrate_timer(&VLAPIC(v)->vlapic_timer, v->processor);
+ migrate_timer(&vcpu_vlapic(v)->vlapic_timer, v->processor);
migrate_timer(&vrtc->second_timer, v->processor);
migrate_timer(&vrtc->second_timer2, v->processor);
migrate_timer(&vpmt->timer, v->processor);
@@ -853,7 +852,7 @@ static void vmx_do_cpuid(struct cpu_user
/* Mask off reserved bits. */
ecx &= ~VMX_VCPU_CPUID_L1_ECX_RESERVED;
- if ( !vlapic_global_enabled((VLAPIC(v))) )
+ if ( !vlapic_global_enabled(vcpu_vlapic(v)) )
clear_bit(X86_FEATURE_APIC, &edx);
#if CONFIG_PAGING_LEVELS >= 3
@@ -1559,7 +1558,7 @@ static int mov_to_cr(int gp, int cr, str
unsigned long value;
unsigned long old_cr;
struct vcpu *v = current;
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
switch ( gp ) {
CASE_GET_REG(EAX, eax);
@@ -1705,8 +1704,6 @@ static int mov_to_cr(int gp, int cr, str
}
case 8:
{
- if ( vlapic == NULL )
- break;
vlapic_set_reg(vlapic, APIC_TASKPRI, ((value & 0x0F) << 4));
break;
}
@@ -1725,7 +1722,7 @@ static void mov_from_cr(int cr, int gp,
{
unsigned long value = 0;
struct vcpu *v = current;
- struct vlapic *vlapic = VLAPIC(v);
+ struct vlapic *vlapic = vcpu_vlapic(v);
switch ( cr )
{
@@ -1733,8 +1730,6 @@ static void mov_from_cr(int cr, int gp,
value = (unsigned long)v->arch.hvm_vmx.cpu_cr3;
break;
case 8:
- if ( vlapic == NULL )
- break;
value = (unsigned long)vlapic_get_reg(vlapic, APIC_TASKPRI);
value = (value & 0xF0) >> 4;
break;
@@ -1835,7 +1830,7 @@ static inline void vmx_do_msr_read(struc
__vmread(GUEST_SYSENTER_EIP, &msr_content);
break;
case MSR_IA32_APICBASE:
- msr_content = VLAPIC(v) ? VLAPIC(v)->apic_base_msr : 0;
+ msr_content = vcpu_vlapic(v)->apic_base_msr;
break;
default:
if (long_mode_do_msr_read(regs))
@@ -1892,7 +1887,7 @@ static inline void vmx_do_msr_write(stru
__vmwrite(GUEST_SYSENTER_EIP, msr_content);
break;
case MSR_IA32_APICBASE:
- vlapic_msr_set(VLAPIC(v), msr_content);
+ vlapic_msr_set(vcpu_vlapic(v), msr_content);
break;
default:
if ( !long_mode_do_msr_write(regs) )
@@ -2307,7 +2302,7 @@ asmlinkage void vmx_vmexit_handler(struc
break;
case EXIT_REASON_TPR_BELOW_THRESHOLD:
- VLAPIC(v)->flush_tpr_threshold = 1;
+ vcpu_vlapic(v)->flush_tpr_threshold = 1;
break;
default:
diff -r 9a6fb3e2f12d -r 9fbb26d47b83 xen/include/asm-x86/hvm/vcpu.h
--- a/xen/include/asm-x86/hvm/vcpu.h Tue Nov 07 13:13:52 2006 +0000
+++ b/xen/include/asm-x86/hvm/vcpu.h Tue Nov 07 15:48:10 2006 +0000
@@ -32,7 +32,7 @@ struct hvm_vcpu {
unsigned long hw_cr3; /* value we give to HW to use */
unsigned long ioflags;
struct hvm_io_op io_op;
- struct vlapic *vlapic;
+ struct vlapic vlapic;
s64 cache_tsc_offset;
u64 guest_time;
diff -r 9a6fb3e2f12d -r 9fbb26d47b83 xen/include/asm-x86/hvm/vlapic.h
--- a/xen/include/asm-x86/hvm/vlapic.h Tue Nov 07 13:13:52 2006 +0000
+++ b/xen/include/asm-x86/hvm/vlapic.h Tue Nov 07 15:48:10 2006 +0000
@@ -25,7 +25,10 @@
#define MAX_VECTOR 256
-#define VLAPIC(v) (v->arch.hvm_vcpu.vlapic)
+#define vcpu_vlapic(vcpu) (&(vcpu)->arch.hvm_vcpu.vlapic)
+#define vlapic_vcpu(vpic) (container_of((vpic), struct vcpu, \
+ arch.hvm_vcpu.vlapic))
+#define vlapic_domain(vpic) (vlapic_vcpu(vlapic)->domain)
#define VLAPIC_ID(vlapic) \
(GET_APIC_ID(vlapic_get_reg(vlapic, APIC_ID)))
@@ -51,8 +54,6 @@ struct vlapic {
int timer_pending_count;
int flush_tpr_threshold;
s_time_t timer_last_update;
- struct vcpu *vcpu;
- struct domain *domain;
struct page_info *regs_page;
void *regs;
};
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