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[Xen-changelog] [xen-unstable] [qemu] sync patches and add file missing from cset 10738:42aa63188a88



# HG changeset patch
# User chris@xxxxxxxxxxxxxxxxxxxxxxxx
# Node ID 4c2a281cd1e7add281823dd4f0198bd51dea00b6
# Parent  2b1a49dd1273b425e22be4a5eca9573aaf5e1e9e
[qemu] sync patches and add file missing from cset 10738:42aa63188a88

Signed-off-by: Christian Limpach <Christian.Limpach@xxxxxxxxxxxxx>
---
 tools/ioemu/ia64_intrinsic.h            |  276 ++++++++++++++++++++++++++++++++
 tools/ioemu/patches/domain-timeoffset   |    8 
 tools/ioemu/patches/qemu-bugfixes       |   37 +++-
 tools/ioemu/patches/vnc-fixes           |   14 +
 tools/ioemu/patches/vnc-start-vncviewer |    6 
 5 files changed, 327 insertions(+), 14 deletions(-)

diff -r 2b1a49dd1273 -r 4c2a281cd1e7 tools/ioemu/patches/domain-timeoffset
--- a/tools/ioemu/patches/domain-timeoffset     Wed Jul 26 14:26:03 2006 +0100
+++ b/tools/ioemu/patches/domain-timeoffset     Wed Jul 26 14:38:00 2006 +0100
@@ -1,7 +1,7 @@ Index: ioemu/hw/mc146818rtc.c
 Index: ioemu/hw/mc146818rtc.c
 ===================================================================
---- ioemu.orig/hw/mc146818rtc.c        2006-07-26 13:39:11.256088974 +0100
-+++ ioemu/hw/mc146818rtc.c     2006-07-26 13:39:18.026364657 +0100
+--- ioemu.orig/hw/mc146818rtc.c        2006-07-26 14:33:00.461515790 +0100
++++ ioemu/hw/mc146818rtc.c     2006-07-26 14:33:07.689716710 +0100
 @@ -178,10 +178,27 @@
      }
  }
@@ -46,8 +46,8 @@ Index: ioemu/hw/mc146818rtc.c
  static void rtc_copy_date(RTCState *s)
 Index: ioemu/hw/pc.c
 ===================================================================
---- ioemu.orig/hw/pc.c 2006-07-26 13:39:17.773391722 +0100
-+++ ioemu/hw/pc.c      2006-07-26 13:39:18.027364550 +0100
+--- ioemu.orig/hw/pc.c 2006-07-26 14:33:07.435744787 +0100
++++ ioemu/hw/pc.c      2006-07-26 14:33:07.690716600 +0100
 @@ -151,7 +151,7 @@
  }
  
@@ -117,8 +117,8 @@ Index: ioemu/hw/pc.c
  QEMUMachine pc_machine = {
 Index: ioemu/vl.c
 ===================================================================
---- ioemu.orig/vl.c    2006-07-26 13:39:17.903377815 +0100
-+++ ioemu/vl.c 2006-07-26 13:39:18.029364336 +0100
+--- ioemu.orig/vl.c    2006-07-26 14:33:07.566730307 +0100
++++ ioemu/vl.c 2006-07-26 14:33:07.692716379 +0100
 @@ -164,6 +164,8 @@
  
  int xc_handle;
@@ -174,8 +174,8 @@ Index: ioemu/vl.c
      qemu_mod_timer(gui_timer, qemu_get_clock(rt_clock));
 Index: ioemu/vl.h
 ===================================================================
---- ioemu.orig/vl.h    2006-07-26 13:39:17.778391187 +0100
-+++ ioemu/vl.h 2006-07-26 13:39:18.030364229 +0100
+--- ioemu.orig/vl.h    2006-07-26 14:33:07.439744345 +0100
++++ ioemu/vl.h 2006-07-26 14:33:07.693716268 +0100
 @@ -556,7 +556,7 @@
                                   int boot_device,
               DisplayState *ds, const char **fd_filename, int snapshot,
diff -r 2b1a49dd1273 -r 4c2a281cd1e7 tools/ioemu/patches/qemu-bugfixes
--- a/tools/ioemu/patches/qemu-bugfixes Wed Jul 26 14:26:03 2006 +0100
+++ b/tools/ioemu/patches/qemu-bugfixes Wed Jul 26 14:38:00 2006 +0100
@@ -1,7 +1,8 @@ diff -r d76fb4ee3e48 console.c
-diff -r d76fb4ee3e48 console.c
---- a/console.c        Mon Jun 26 15:16:44 2006 +0100
-+++ b/console.c        Mon Jun 26 15:47:43 2006 +0100
-@@ -449,7 +449,7 @@ static void text_console_resize(TextCons
+Index: ioemu/console.c
+===================================================================
+--- ioemu.orig/console.c       2006-07-26 13:39:11.999009495 +0100
++++ ioemu/console.c    2006-07-26 14:15:19.413719225 +0100
+@@ -449,7 +449,7 @@
              c++;
          }
      }
@@ -10,9 +11,47 @@ diff -r d76fb4ee3e48 console.c
      s->cells = cells;
  }
  
-diff -r d76fb4ee3e48 usb-linux.c
---- a/usb-linux.c      Mon Jun 26 15:16:44 2006 +0100
-+++ b/usb-linux.c      Mon Jun 26 15:47:43 2006 +0100
+@@ -954,11 +954,21 @@
+     return !active_console->text_console;
+ }
+ 
++void set_color_table(DisplayState *ds) 
++{
++    int i, j;
++    for(j = 0; j < 2; j++) {
++      for(i = 0; i < 8; i++) {
++          color_table[j][i] =
++              col_expand(ds, vga_get_color(ds, color_table_rgb[j][i]));
++      }
++    }
++}
++
+ CharDriverState *text_console_init(DisplayState *ds)
+ {
+     CharDriverState *chr;
+     TextConsole *s;
+-    int i,j;
+     static int color_inited;
+ 
+     chr = qemu_mallocz(sizeof(CharDriverState));
+@@ -976,12 +986,7 @@
+ 
+     if (!color_inited) {
+         color_inited = 1;
+-        for(j = 0; j < 2; j++) {
+-            for(i = 0; i < 8; i++) {
+-                color_table[j][i] = col_expand(s->ds, 
+-                        vga_get_color(s->ds, color_table_rgb[j][i]));
+-            }
+-        }
++        set_color_table(ds);
+     }
+     s->y_displayed = 0;
+     s->y_base = 0;
+Index: ioemu/usb-linux.c
+===================================================================
+--- ioemu.orig/usb-linux.c     2006-07-26 13:39:11.999009495 +0100
++++ ioemu/usb-linux.c  2006-07-26 13:39:16.622514851 +0100
 @@ -26,6 +26,7 @@
  #if defined(__linux__)
  #include <dirent.h>
diff -r 2b1a49dd1273 -r 4c2a281cd1e7 tools/ioemu/patches/vnc-fixes
--- a/tools/ioemu/patches/vnc-fixes     Wed Jul 26 14:26:03 2006 +0100
+++ b/tools/ioemu/patches/vnc-fixes     Wed Jul 26 14:38:00 2006 +0100
@@ -1,7 +1,7 @@ Index: ioemu/vl.c
 Index: ioemu/vl.c
 ===================================================================
---- ioemu.orig/vl.c    2006-07-26 13:39:18.439320475 +0100
-+++ ioemu/vl.c 2006-07-26 14:13:44.488196651 +0100
+--- ioemu.orig/vl.c    2006-07-26 14:29:04.481598583 +0100
++++ ioemu/vl.c 2006-07-26 14:31:22.668325993 +0100
 @@ -6003,8 +6003,10 @@
                    kernel_filename, kernel_cmdline, initrd_filename,
                    timeoffset);
@@ -17,8 +17,8 @@ Index: ioemu/vl.c
      if (use_gdbstub) {
 Index: ioemu/vnc.c
 ===================================================================
---- ioemu.orig/vnc.c   2006-07-26 13:39:18.437320689 +0100
-+++ ioemu/vnc.c        2006-07-26 14:16:51.636538318 +0100
+--- ioemu.orig/vnc.c   2006-07-26 14:29:04.479598804 +0100
++++ ioemu/vnc.c        2006-07-26 14:31:22.669325883 +0100
 @@ -3,6 +3,7 @@
   * 
   * Copyright (C) 2006 Anthony Liguori <anthony@xxxxxxxxxxxxx>
@@ -491,3 +491,15 @@ Index: ioemu/vnc.c
 -
      vnc_dpy_resize(vs->ds, 640, 400);
  }
+Index: ioemu/vl.h
+===================================================================
+--- ioemu.orig/vl.h    2006-07-26 14:31:22.669325883 +0100
++++ ioemu/vl.h 2006-07-26 14:32:44.505279724 +0100
+@@ -301,6 +301,7 @@
+ int is_graphic_console(void);
+ CharDriverState *text_console_init(DisplayState *ds);
+ void console_select(unsigned int index);
++void set_color_table(DisplayState *ds);
+ 
+ /* serial ports */
+ 
diff -r 2b1a49dd1273 -r 4c2a281cd1e7 tools/ioemu/patches/vnc-start-vncviewer
--- a/tools/ioemu/patches/vnc-start-vncviewer   Wed Jul 26 14:26:03 2006 +0100
+++ b/tools/ioemu/patches/vnc-start-vncviewer   Wed Jul 26 14:38:00 2006 +0100
@@ -1,7 +1,7 @@ Index: ioemu/vnc.c
 Index: ioemu/vnc.c
 ===================================================================
---- ioemu.orig/vnc.c   2006-07-26 14:16:51.636538318 +0100
-+++ ioemu/vnc.c        2006-07-26 14:18:15.612266329 +0100
+--- ioemu.orig/vnc.c   2006-07-26 14:33:08.166663983 +0100
++++ ioemu/vnc.c        2006-07-26 14:33:08.225657462 +0100
 @@ -1002,3 +1002,25 @@
  
      vnc_dpy_resize(vs->ds, 640, 400);
@@ -30,8 +30,8 @@ Index: ioemu/vnc.c
 +}
 Index: ioemu/vl.c
 ===================================================================
---- ioemu.orig/vl.c    2006-07-26 14:13:44.488196651 +0100
-+++ ioemu/vl.c 2006-07-26 14:18:15.615265998 +0100
+--- ioemu.orig/vl.c    2006-07-26 14:33:08.165664094 +0100
++++ ioemu/vl.c 2006-07-26 14:33:08.227657240 +0100
 @@ -121,6 +121,7 @@
  int bios_size;
  static DisplayState display_state;
@@ -93,8 +93,8 @@ Index: ioemu/vl.c
          sdl_display_init(ds, full_screen);
 Index: ioemu/vl.h
 ===================================================================
---- ioemu.orig/vl.h    2006-07-26 14:18:05.490383989 +0100
-+++ ioemu/vl.h 2006-07-26 14:18:15.616265887 +0100
+--- ioemu.orig/vl.h    2006-07-26 14:33:08.167663873 +0100
++++ ioemu/vl.h 2006-07-26 14:33:08.228657130 +0100
 @@ -733,6 +733,7 @@
  
  /* vnc.c */
diff -r 2b1a49dd1273 -r 4c2a281cd1e7 tools/ioemu/ia64_intrinsic.h
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/tools/ioemu/ia64_intrinsic.h      Wed Jul 26 14:38:00 2006 +0100
@@ -0,0 +1,276 @@
+#ifndef IA64_INTRINSIC_H
+#define IA64_INTRINSIC_H
+
+/*
+ * Compiler-dependent Intrinsics
+ *
+ * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@xxxxxxxxx>
+ * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@xxxxxxxxx>
+ *
+ */
+extern long ia64_cmpxchg_called_with_bad_pointer (void);
+extern void ia64_bad_param_for_getreg (void);
+#define ia64_cmpxchg(sem,ptr,o,n,s) ({                                 \
+       uint64_t _o, _r;                                                \
+       switch(s) {                                                     \
+               case 1: _o = (uint8_t)(long)(o); break;                 \
+               case 2: _o = (uint16_t)(long)(o); break;                \
+               case 4: _o = (uint32_t)(long)(o); break;                \
+               case 8: _o = (uint64_t)(long)(o); break;                \
+               default: break;                                         \
+       }                                                               \
+       switch(s) {                                                     \
+               case 1:                                                 \
+               _r = ia64_cmpxchg1_##sem((uint8_t*)ptr,n,_o); break;    \
+               case 2:                                                 \
+               _r = ia64_cmpxchg2_##sem((uint16_t*)ptr,n,_o); break;   \
+               case 4:                                                 \
+               _r = ia64_cmpxchg4_##sem((uint32_t*)ptr,n,_o); break;   \
+               case 8:                                                 \
+               _r = ia64_cmpxchg8_##sem((uint64_t*)ptr,n,_o); break;   \
+               default:                                                \
+               _r = ia64_cmpxchg_called_with_bad_pointer(); break;     \
+       }                                                               \
+       (__typeof__(o)) _r;                                             \
+})
+
+#define cmpxchg_acq(ptr,o,n) ia64_cmpxchg(acq,ptr,o,n,sizeof(*ptr))
+#define cmpxchg_rel(ptr,o,n) ia64_cmpxchg(rel,ptr,o,n,sizeof(*ptr))
+
+/*
+ * Register Names for getreg() and setreg().
+ *
+ * The "magic" numbers happen to match the values used by the Intel compiler's
+ * getreg()/setreg() intrinsics.
+ */
+
+/* Special Registers */
+
+#define _IA64_REG_IP           1016    /* getreg only */
+#define _IA64_REG_PSR          1019
+#define _IA64_REG_PSR_L                1019
+
+/* General Integer Registers */
+
+#define _IA64_REG_GP           1025    /* R1 */
+#define _IA64_REG_R8           1032    /* R8 */
+#define _IA64_REG_R9           1033    /* R9 */
+#define _IA64_REG_SP           1036    /* R12 */
+#define _IA64_REG_TP           1037    /* R13 */
+
+/* Application Registers */
+
+#define _IA64_REG_AR_KR0       3072
+#define _IA64_REG_AR_KR1       3073
+#define _IA64_REG_AR_KR2       3074
+#define _IA64_REG_AR_KR3       3075
+#define _IA64_REG_AR_KR4       3076
+#define _IA64_REG_AR_KR5       3077
+#define _IA64_REG_AR_KR6       3078
+#define _IA64_REG_AR_KR7       3079
+#define _IA64_REG_AR_RSC       3088
+#define _IA64_REG_AR_BSP       3089
+#define _IA64_REG_AR_BSPSTORE  3090
+#define _IA64_REG_AR_RNAT      3091
+#define _IA64_REG_AR_FCR       3093
+#define _IA64_REG_AR_EFLAG     3096
+#define _IA64_REG_AR_CSD       3097
+#define _IA64_REG_AR_SSD       3098
+#define _IA64_REG_AR_CFLAG     3099
+#define _IA64_REG_AR_FSR       3100
+#define _IA64_REG_AR_FIR       3101
+#define _IA64_REG_AR_FDR       3102
+#define _IA64_REG_AR_CCV       3104
+#define _IA64_REG_AR_UNAT      3108
+#define _IA64_REG_AR_FPSR      3112
+#define _IA64_REG_AR_ITC       3116
+#define _IA64_REG_AR_PFS       3136
+#define _IA64_REG_AR_LC                3137
+#define _IA64_REG_AR_EC                3138
+
+/* Control Registers */
+
+#define _IA64_REG_CR_DCR       4096
+#define _IA64_REG_CR_ITM       4097
+#define _IA64_REG_CR_IVA       4098
+#define _IA64_REG_CR_PTA       4104
+#define _IA64_REG_CR_IPSR      4112
+#define _IA64_REG_CR_ISR       4113
+#define _IA64_REG_CR_IIP       4115
+#define _IA64_REG_CR_IFA       4116
+#define _IA64_REG_CR_ITIR      4117
+#define _IA64_REG_CR_IIPA      4118
+#define _IA64_REG_CR_IFS       4119
+#define _IA64_REG_CR_IIM       4120
+#define _IA64_REG_CR_IHA       4121
+#define _IA64_REG_CR_LID       4160
+#define _IA64_REG_CR_IVR       4161    /* getreg only */
+#define _IA64_REG_CR_TPR       4162
+#define _IA64_REG_CR_EOI       4163
+#define _IA64_REG_CR_IRR0      4164    /* getreg only */
+#define _IA64_REG_CR_IRR1      4165    /* getreg only */
+#define _IA64_REG_CR_IRR2      4166    /* getreg only */
+#define _IA64_REG_CR_IRR3      4167    /* getreg only */
+#define _IA64_REG_CR_ITV       4168
+#define _IA64_REG_CR_PMV       4169
+#define _IA64_REG_CR_CMCV      4170
+#define _IA64_REG_CR_LRR0      4176
+#define _IA64_REG_CR_LRR1      4177
+
+/* Indirect Registers for getindreg() and setindreg() */
+
+#define _IA64_REG_INDR_CPUID   9000    /* getindreg only */
+#define _IA64_REG_INDR_DBR     9001
+#define _IA64_REG_INDR_IBR     9002
+#define _IA64_REG_INDR_PKR     9003
+#define _IA64_REG_INDR_PMC     9004
+#define _IA64_REG_INDR_PMD     9005
+#define _IA64_REG_INDR_RR      9006
+
+#ifdef __INTEL_COMPILER
+void  __fc(uint64_t *addr);
+void  __synci(void);
+void __isrlz(void);
+void __dsrlz(void);
+uint64_t __getReg(const int whichReg);
+uint64_t _InterlockedCompareExchange8_rel(volatile uint8_t *dest, uint64_t 
xchg, uint64_t comp);
+uint64_t _InterlockedCompareExchange8_acq(volatile uint8_t *dest, uint64_t 
xchg, uint64_t comp);
+uint64_t _InterlockedCompareExchange16_rel(volatile uint16_t *dest, uint64_t 
xchg, uint64_t comp);
+uint64_t _InterlockedCompareExchange16_acq(volatile uint16_t *dest, uint64_t 
xchg, uint64_t comp);
+uint64_t _InterlockedCompareExchange_rel(volatile uint32_t *dest, uint64_t 
xchg, uint64_t comp);
+uint64_t _InterlockedCompareExchange_acq(volatile uint32_t *dest, uint64_t 
xchg, uint64_t comp);
+uint64_t _InterlockedCompareExchange64_rel(volatile uint64_t *dest, uint64_t 
xchg, uint64_t comp);
+u64_t _InterlockedCompareExchange64_acq(volatile uint64_t *dest, uint64_t 
xchg, uint64_t comp);
+
+#define ia64_cmpxchg1_rel      _InterlockedCompareExchange8_rel
+#define ia64_cmpxchg1_acq      _InterlockedCompareExchange8_acq
+#define ia64_cmpxchg2_rel      _InterlockedCompareExchange16_rel
+#define ia64_cmpxchg2_acq      _InterlockedCompareExchange16_acq
+#define ia64_cmpxchg4_rel      _InterlockedCompareExchange_rel
+#define ia64_cmpxchg4_acq      _InterlockedCompareExchange_acq
+#define ia64_cmpxchg8_rel      _InterlockedCompareExchange64_rel
+#define ia64_cmpxchg8_acq      _InterlockedCompareExchange64_acq
+
+#define ia64_srlz_d            __dsrlz
+#define ia64_srlz_i            __isrlz
+#define __ia64_fc              __fc
+#define ia64_sync_i            __synci
+#define __ia64_getreg          __getReg
+#else /* __INTEL_COMPILER */
+#define ia64_cmpxchg1_acq(ptr, new, old)                                       
        \
+({                                                                             
        \
+       uint64_t ia64_intri_res;                                                
        \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                          
        \
+       asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv":                         
        \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : 
"memory");    \
+       ia64_intri_res;                                                         
        \
+})
+
+#define ia64_cmpxchg1_rel(ptr, new, old)                                       
        \
+({                                                                             
        \
+       uint64_t ia64_intri_res;                                                
        \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                          
        \
+       asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv":                         
        \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : 
"memory");    \
+       ia64_intri_res;                                                         
        \
+})
+
+#define ia64_cmpxchg2_acq(ptr, new, old)                                       
        \
+({                                                                             
        \
+       uint64_t ia64_intri_res;                                                
        \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                          
        \
+       asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv":                         
        \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : 
"memory");    \
+       ia64_intri_res;                                                         
        \
+})
+
+#define ia64_cmpxchg2_rel(ptr, new, old)                                       
        \
+({                                                                             
        \
+       uint64_t ia64_intri_res;                                                
        \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                          
        \
+                                                                               
        \
+       asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv":                         
        \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : 
"memory");    \
+       ia64_intri_res;                                                         
        \
+})
+
+#define ia64_cmpxchg4_acq(ptr, new, old)                                       
        \
+({                                                                             
        \
+       uint64_t ia64_intri_res;                                                
        \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                          
        \
+       asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv":                         
        \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : 
"memory");    \
+       ia64_intri_res;                                                         
        \
+})
+
+#define ia64_cmpxchg4_rel(ptr, new, old)                                       
        \
+({                                                                             
        \
+       uint64_t ia64_intri_res;                                                
        \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                          
        \
+       asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv":                         
        \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : 
"memory");    \
+       ia64_intri_res;                                                         
        \
+})
+
+#define ia64_cmpxchg8_acq(ptr, new, old)                                       
        \
+({                                                                             
        \
+       uint64_t ia64_intri_res;                                                
        \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                          
        \
+       asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv":                         
        \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : 
"memory");    \
+       ia64_intri_res;                                                         
        \
+})
+
+#define ia64_cmpxchg8_rel(ptr, new, old)                                       
        \
+({                                                                             
        \
+       uint64_t ia64_intri_res;                                                
        \
+       asm volatile ("mov ar.ccv=%0;;" :: "rO"(old));                          
        \
+                                                                               
        \
+       asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv":                         
        \
+                             "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : 
"memory");    \
+       ia64_intri_res;                                                         
        \
+})
+
+#define ia64_srlz_i()  asm volatile (";; srlz.i ;;" ::: "memory")
+#define ia64_srlz_d()  asm volatile (";; srlz.d" ::: "memory");
+#define __ia64_fc(addr)        asm volatile ("fc %0" :: "r"(addr) : "memory")
+#define ia64_sync_i()  asm volatile (";; sync.i" ::: "memory")
+
+register unsigned long ia64_r13 asm ("r13") __attribute_used__;
+#define __ia64_getreg(regnum)                                                  
\
+({                                                                             
\
+       uint64_t ia64_intri_res;                                                
        \
+                                                                               
\
+       switch (regnum) {                                                       
\
+       case _IA64_REG_GP:                                                      
\
+               asm volatile ("mov %0=gp" : "=r"(ia64_intri_res));              
\
+               break;                                                          
\
+       case _IA64_REG_IP:                                                      
\
+               asm volatile ("mov %0=ip" : "=r"(ia64_intri_res));              
\
+               break;                                                          
\
+       case _IA64_REG_PSR:                                                     
\
+               asm volatile ("mov %0=psr" : "=r"(ia64_intri_res));             
\
+               break;                                                          
\
+       case _IA64_REG_TP:      /* for current() */                             
\
+               ia64_intri_res = ia64_r13;                                      
\
+               break;                                                          
\
+       case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC:                              
\
+               asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res)             
\
+                                     : "i"(regnum - _IA64_REG_AR_KR0));        
\
+               break;                                                          
\
+       case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1:                            
\
+               asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res)             
\
+                                     : "i" (regnum - _IA64_REG_CR_DCR));       
\
+               break;                                                          
\
+       case _IA64_REG_SP:                                                      
\
+               asm volatile ("mov %0=sp" : "=r" (ia64_intri_res));             
\
+               break;                                                          
\
+       default:                                                                
\
+               ia64_bad_param_for_getreg();                                    
\
+               break;                                                          
\
+       }                                                                       
\
+       ia64_intri_res;                                                         
\
+})
+
+#endif /* __INTEL_COMPILER */
+#endif /* IA64_INTRINSIC_H */

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