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[Xen-changelog] Remove TBF_SLOW_IRET hack from x86/64 Xen return-to-guest



# HG changeset patch
# User kaf24@xxxxxxxxxxxxxxxxxxxx
# Node ID 49c02a7a92dd501cac68b8cb9a47e62e6b2e3200
# Parent  436c4c83a200cd86e1304e36a1278bdc1ecb490d
Remove TBF_SLOW_IRET hack from x86/64 Xen return-to-guest
path. Guest should set up flags for itself in its own
NMI handler.

Signed-off-by: Keir Fraser <keir@xxxxxxxxxxxxx>

diff -r 436c4c83a200 -r 49c02a7a92dd xen/arch/x86/x86_64/entry.S
--- a/xen/arch/x86/x86_64/entry.S       Thu Feb 23 17:27:18 2006
+++ b/xen/arch/x86/x86_64/entry.S       Thu Feb 23 17:30:43 2006
@@ -206,7 +206,7 @@
         sti
         leaq VCPU_trap_bounce(%rbx),%rdx
         movq %rax,TRAPBOUNCE_eip(%rdx)
-        movw $(TBF_INTERRUPT|TBF_SLOW_IRET),TRAPBOUNCE_flags(%rdx)
+        movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
         call create_bounce_frame
         jmp  test_all_events
 1:      bts  $_VCPUF_nmi_pending,VCPU_flags(%rbx)
@@ -229,9 +229,6 @@
 1:      /* In kernel context already: push new frame at existing %rsp. */
         movq  UREGS_rsp+8(%rsp),%rsi
         andb  $0xfc,UREGS_cs+8(%rsp)    # Indicate kernel context to guest.
-       testw $(TBF_SLOW_IRET),TRAPBOUNCE_flags(%rdx)
-       jz    2f
-       orb   $0x01,UREGS_cs+8(%rsp)
 2:      andq  $~0xf,%rsi                # Stack frames are 16-byte aligned.
         movq  $HYPERVISOR_VIRT_START,%rax
         cmpq  %rax,%rsi
diff -r 436c4c83a200 -r 49c02a7a92dd xen/include/asm-x86/processor.h
--- a/xen/include/asm-x86/processor.h   Thu Feb 23 17:27:18 2006
+++ b/xen/include/asm-x86/processor.h   Thu Feb 23 17:30:43 2006
@@ -124,7 +124,6 @@
 #define TBF_EXCEPTION_ERRCODE  2
 #define TBF_INTERRUPT          8
 #define TBF_FAILSAFE          16
-#define TBF_SLOW_IRET         32
 
 /* 'arch_vcpu' flags values */
 #define _TF_kernel_mode        0

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