[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-bugs] [Bug 782] xen panics with "IO-APIC + timer doesn't work!" message
http://bugzilla.xensource.com/bugzilla/show_bug.cgi?id=782 ------- Comment #1 from register@xxxxxxxx 2006-09-29 04:55 ------- the kernel messages when booting the standard kernel, maybe this does help: <6>DMI 2.2 present. <6>Using APIC driver default <7>ACPI: RSDP (v000 Nvidia ) @ 0x000f7a60 <7>ACPI: RSDT (v001 Nvidia AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x7fff3040 <7>ACPI: FADT (v001 Nvidia AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x7fff30c0 <7>ACPI: SSDT (v001 PTLTD POWERNOW 0x00000001 LTP 0x00000001) @ 0x7fff9c40 <7>ACPI: MCFG (v001 Nvidia AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x7fff9f00 <7>ACPI: MADT (v001 Nvidia AWRDACPI 0x42302e31 AWRD 0x00000000) @ 0x7fff9b80 <7>ACPI: DSDT (v001 NVIDIA AWRDACPI 0x00001000 MSFT 0x0100000e) @ 0x00000000 <6>ACPI: PM-Timer IO Port: 0x1008 <6>ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) <4>Processor #0 15:11 APIC version 16 <6>ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) <4>Processor #1 15:11 APIC version 16 <6>ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) <6>ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) <6>Overriding APIC driver with bigsmp <6>Using ACPI for processor (LAPIC) configuration information <6>Using ACPI for processor (LAPIC) configuration information <6>Intel MultiProcessor Specification v1.4 <6> Virtual Wire compatibility mode. <6>OEM ID: OEM00000 Product ID: PROD00000000 APIC at: 0xFEE00000 <6>I/O APIC #2 Version 17 at 0xFEC00000. <4>Enabling APIC mode: Physflat. Using 1 I/O APICs <6>Processors: 2 <4>Allocating PCI resources starting at 88000000 (gap: 80000000:70000000) <4>Built 1 zonelists <5>Kernel command line: root=/dev/disk/by-label/sles vga=0x31a nolapic ... ... <6>Total of 2 processors activated (9606.96 BogoMIPS). <4>ExtINT not setup in hardware but reported by MP table <4>ENABLING IO-APIC IRQs <6>..TIMER: vector=0x31 apic1=0 pin1=2 apic2=0 pin2=0 <6>checking TSC synchronization across 2 CPUs: <6>CPU#0 had 0 usecs TSC skew, fixed it up. <6>CPU#1 had 0 usecs TSC skew, fixed it up. <6>Enabling SMP... <6>Brought up 2 CPUs -- Configure bugmail: http://bugzilla.xensource.com/bugzilla/userprefs.cgi?tab=email ------- You are receiving this mail because: ------- You are the assignee for the bug, or are watching the assignee. _______________________________________________ Xen-bugs mailing list Xen-bugs@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-bugs
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