Re: [XenARM] Cortex-A15 Virtualization Support and IOMMU

[Adi Habusha <adieinav.h@xxxxxxxxx>]

Hi,

I was happy to hear you have release initial virtualization support for
ARM Cortex A15 using the LPAE, GIC and Generic Timer.
Can you please elaborate how does DMA address space is managed? Is it
Guest OS Physical Address (IPA) or system Physical Address?
If Guest OS (IPA), is there any level of support to IOMMU (based on ARM
SMMU architecture)

Thanks,
Eden

>



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