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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Minios-devel] [UNIKRAFT PATCH v2 5/6] arch/*, build: Introduce reserved `isr` variant
Reviewed-by: Felipe Huici <felipe.huici@xxxxxxxxx>
On 13.03.20, 12:56, "Simon Kuenzer" <simon.kuenzer@xxxxxxxxx> wrote:
In order to compile functions that can be called within interrupt
context, we introduce the reserved `isr` variant. As soon as this
variant is given to a source file, different ARCHFLAGS(-y) are used
for the compilation: ISR_ARCHFLAGS(-y). These flags are defined in the
architecture and forbid the compiler to use enhanced CPU functions
that are not saved within interrupt context (e.g., floating point
units, vector units).
Signed-off-by: Simon Kuenzer <simon.kuenzer@xxxxxxxxx>
---
Makefile | 2 ++
Makefile.uk | 1 +
arch/arm/arm/Makefile.uk | 16 ++++++++++++++++
arch/arm/arm64/Makefile.uk | 12 ++++++++++++
arch/x86/x86_64/Makefile.uk | 19 ++++++++++++++++++-
plat/kvm/Makefile.uk | 3 +--
support/build/Makefile.rules | 17 ++++++++++++-----
7 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/Makefile b/Makefile
index 6c965a15..b1e80303 100644
--- a/Makefile
+++ b/Makefile
@@ -264,6 +264,8 @@ UK_CLEAN :=
UK_CLEAN-y :=
ARCHFLAGS :=
ARCHFLAGS-y :=
+ISR_ARCHFLAGS :=
+ISR_ARCHFLAGS-y :=
COMPFLAGS :=
COMPFLAGS-y :=
ASFLAGS :=
diff --git a/Makefile.uk b/Makefile.uk
index c9e3220c..a78afc05 100644
--- a/Makefile.uk
+++ b/Makefile.uk
@@ -44,6 +44,7 @@ DBGFLAGS-$(CONFIG_DEBUG_SYMBOLS_LVL3) += -g3
COMPFLAGS += -D __Unikraft__ -DUK_CODENAME="$(UK_CODENAME)"
COMPFLAGS += -DUK_VERSION=$(UK_VERSION).$(UK_SUBVERSION)
COMPFLAGS += -DUK_FULLVERSION=$(UK_FULLVERSION)
+ISR_ARCHFLAGS += -D__INTERRUPTSAFE__
M4FLAGS += -D __Unikraft__ -DUK_CODENAME="$(UK_CODENAME)"
M4FLAGS += -DUK_VERSION=$(UK_VERSION).$(UK_SUBVERSION)
diff --git a/arch/arm/arm/Makefile.uk b/arch/arm/arm/Makefile.uk
index 6bb3ca8b..37e289e8 100644
--- a/arch/arm/arm/Makefile.uk
+++ b/arch/arm/arm/Makefile.uk
@@ -1,74 +1,90 @@
ARCHFLAGS += -D__ARM_32__
ARCHFLAGS += -marm
+ISR_ARCHFLAGS += -D__ARM_32__
+ISR_ARCHFLAGS += -marm
CINCLUDES += -I$(CONFIG_UK_BASE)/arch/arm/arm/include
ASINCLUDES += -I$(CONFIG_UK_BASE)/arch/arm/arm/include
CXXINCLUDES += -I$(CONFIG_UK_BASE)/arch/arm/arm/include
+# Disable FPU for trap/exception/interrupt handlers
+ISR_ARCHFLAGS += -mfpu=none
+
# Set GCC flags for MARCH_ARM32_GENERICV7. GCC supports
-mtune=generic-armv7-a from 4.7
ifeq ($(CONFIG_MARCH_ARM32_GENERICV7),y)
$(call error_if_gcc_version_lt,4,7)
ARCHFLAGS-$(call gcc_version_ge,4,7) += -march=armv7-a
-mtune=generic-armv7-a
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,7) += -march=armv7-a
-mtune=generic-armv7-a
endif
# Set GCC flags for MARCH_ARM32_CORTEXA5. GCC supports -mcpu=cortex-a5
from 4.5
ifeq ($(CONFIG_MARCH_ARM32_CORTEXA5),y)
$(call error_if_gcc_version_lt,4,5)
ARCHFLAGS-$(call gcc_version_ge,4,5) += -mcpu=cortex-a5
-mtune=cortex-a5
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,5) += -mcpu=cortex-a5
-mtune=cortex-a5
endif
# Set GCC flags for MARCH_ARM32_CORTEXA7. GCC supports -mcpu=cortex-a7
from 4.7
ifeq ($(CONFIG_MARCH_ARM32_CORTEXA7),y)
$(call error_if_gcc_version_lt,4,7)
ARCHFLAGS-$(call gcc_version_ge,4,7) += -mcpu=cortex-a7
-mtune=cortex-a7
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,7) += -mcpu=cortex-a7
-mtune=cortex-a7
endif
# Set GCC flags for MARCH_ARM32_CORTEXA8. GCC supports -mcpu=cortex-a8
from 4.3
ifeq ($(CONFIG_MARCH_ARM32_CORTEXA8),y)
$(call error_if_gcc_version_lt,4,3)
ARCHFLAGS-$(call gcc_version_ge,4,3) += -mcpu=cortex-a8
-mtune=cortex-a8
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,3) += -mcpu=cortex-a8
-mtune=cortex-a8
endif
# Set GCC flags for MARCH_ARM32_CORTEXA9. GCC supports -mcpu=cortex-a9
from 4.4
ifeq ($(CONFIG_MARCH_ARM32_CORTEXA9),y)
$(call error_if_gcc_version_lt,4,4)
ARCHFLAGS-$(call gcc_version_ge,4,4) += -mcpu=cortex-a9
-mtune=cortex-a9
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,4) += -mcpu=cortex-a9
-mtune=cortex-a9
endif
# Set GCC flags for MARCH_ARM32_CORTEXA12. GCC supports -mcpu=cortex-a12
from 4.9
ifeq ($(CONFIG_MARCH_ARM32_CORTEXA12),y)
$(call error_if_gcc_version_lt,4,9)
ARCHFLAGS-$(call gcc_version_ge,4,9) += -mcpu=cortex-a12
-mtune=cortex-a12
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,9) += -mcpu=cortex-a12
-mtune=cortex-a12
endif
# Set GCC flags for MARCH_ARM32_CORTEXA15. GCC supports -mcpu=cortex-a15
from 4.6
ifeq ($(CONFIG_MARCH_ARM32_CORTEXA15),y)
$(call error_if_gcc_version_lt,4,6)
ARCHFLAGS-$(call gcc_version_ge,4,6) += -mcpu=cortex-a15
-mtune=cortex-a15
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,6) += -mcpu=cortex-a15
-mtune=cortex-a15
endif
# Set GCC flags for MARCH_ARM32_CORTEXA17. GCC supports -mcpu=cortex-a17
from 6.1
ifeq ($(CONFIG_MARCH_ARM32_CORTEXA17),y)
$(call error_if_gcc_version_lt,6,1)
ARCHFLAGS-$(call gcc_version_ge,6,1) += -mcpu=cortex-a17
-mtune=cortex-a17
+ISR_ARCHFLAGS-$(call gcc_version_ge,6,1) += -mcpu=cortex-a17
-mtune=cortex-a17
endif
# Set GCC flags for MARCH_ARM32_CORTEXA32. GCC supports -mcpu=cortex-a32
from 6.1
ifeq ($(CONFIG_MARCH_ARM32_CORTEXA32),y)
$(call error_if_gcc_version_lt,6,1)
ARCHFLAGS-$(call gcc_version_ge,6,1) += -mcpu=cortex-a32
-mtune=cortex-a32
+ISR_ARCHFLAGS-$(call gcc_version_ge,6,1) += -mcpu=cortex-a32
-mtune=cortex-a32
endif
# Set GCC flags for MARCH_ARM32_CORTEXA35. GCC supports -mcpu=cortex-a35
from 6.1
ifeq ($(CONFIG_MARCH_ARM32_CORTEXA35),y)
$(call error_if_gcc_version_lt,6,1)
ARCHFLAGS-$(call gcc_version_ge,6,1) += -mcpu=cortex-a35
-mtune=cortex-a35
+ISR_ARCHFLAGS-$(call gcc_version_ge,6,1) += -mcpu=cortex-a35
-mtune=cortex-a35
endif
# Set GCC flags for MARCH_ARM32_A20NEON. GCC supports -mcpu=cortex-a7 from
4.7
ifeq ($(CONFIG_MARCH_ARM32_A20NEON),y)
$(call error_if_gcc_version_lt,4,7)
ARCHFLAGS-$(call gcc_version_ge,4,7) += -mcpu=cortex-a7
-mtune=cortex-a7 -mfpu=vfpv4-d16 -mfpu=neon-vfpv4 -funsafe-math-optimizations
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,7) += -mcpu=cortex-a7
-mtune=cortex-a7 -funsafe-math-optimizations
endif
$(eval $(call addlib,libarmmath))
diff --git a/arch/arm/arm64/Makefile.uk b/arch/arm/arm64/Makefile.uk
index 9f0ab529..77e5204d 100644
--- a/arch/arm/arm64/Makefile.uk
+++ b/arch/arm/arm64/Makefile.uk
@@ -4,6 +4,10 @@
# the FP & SIMD registers to pass parameters, we use -mgeneral-regs-only
# flag to force GCC to use generic registers
ARCHFLAGS += -D__ARM_64__ -mgeneral-regs-only
+ISR_ARCHFLAGS += -D__ARM_64__ -mgeneral-regs-only
+
+# Disable FPU for trap/exception/interrupt handlers
+ISR_ARCHFLAGS += -mfpu=none
CINCLUDES += -I$(CONFIG_UK_BASE)/arch/arm/arm64/include
ASINCLUDES += -I$(CONFIG_UK_BASE)/arch/arm/arm64/include
@@ -13,46 +17,54 @@ CXXINCLUDES +=
-I$(CONFIG_UK_BASE)/arch/arm/arm64/include
ifeq ($(CONFIG_MARCH_ARM64_NATIVE),y)
$(call error_if_gcc_version_lt,6,0)
ARCHFLAGS-$(call gcc_version_ge,6,0) += -mcpu=native
+ISR_ARCHFLAGS-$(call gcc_version_ge,6,0) += -mcpu=native
endif
# GCC support -mcpu=generic for arm64 from 4.8
ifeq ($(CONFIG_MARCH_ARM64_GENERIC),y)
$(call error_if_gcc_version_lt,4,8)
ARCHFLAGS-$(call gcc_version_ge,4,8) += -march=armv8-a -mcpu=generic
-mtune=generic
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,8) += -march=armv8-a -mcpu=generic
-mtune=generic
endif
# GCC support -mcpu=cortex-a53 for arm64 from 4.9
ifeq ($(CONFIG_MARCH_ARM64_CORTEXA53),y)
$(call error_if_gcc_version_lt,4,9)
ARCHFLAGS-$(call gcc_version_ge,4,9) += -march=armv8-a
-mcpu=cortex-a53 -mtune=cortex-a53
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,9) += -march=armv8-a
-mcpu=cortex-a53 -mtune=cortex-a53
endif
# GCC support -mcpu=cortex-a57 for arm64 from 4.9
ifeq ($(CONFIG_MARCH_ARM64_CORTEXA57),y)
$(call error_if_gcc_version_lt,4,9)
ARCHFLAGS-$(call gcc_version_ge,4,9) += -march=armv8-a
-mcpu=cortex-a57 -mtune=cortex-a57
+ISR_ARCHFLAGS-$(call gcc_version_ge,4,9) += -march=armv8-a
-mcpu=cortex-a57 -mtune=cortex-a57
endif
# GCC support -mcpu=cortex-a72 for arm64 from 5.0
ifeq ($(CONFIG_MARCH_ARM64_CORTEXA72),y)
$(call error_if_gcc_version_lt,5,0)
ARCHFLAGS-$(call gcc_version_ge,5,0) += -march=armv8-a
-mcpu=cortex-a72 -mtune=cortex-a72
+ISR_ARCHFLAGS-$(call gcc_version_ge,5,0) += -march=armv8-a
-mcpu=cortex-a72 -mtune=cortex-a72
endif
# GCC support -mcpu=cortex-a73 for arm64 from 7.0
ifeq ($(CONFIG_MARCH_ARM64_CORTEXA73),y)
$(call error_if_gcc_version_lt,7,0)
ARCHFLAGS-$(call gcc_version_ge,7,0) += -march=armv8-a
-mcpu=cortex-a73 -mtune=cortex-a73
+ISR_ARCHFLAGS-$(call gcc_version_ge,7,0) += -march=armv8-a
-mcpu=cortex-a73 -mtune=cortex-a73
endif
# GCC support -mcpu=cortex-a55 for arm64 from 8.0
ifeq ($(CONFIG_MARCH_ARM64_CORTEXA55),y)
$(call error_if_gcc_version_lt,8,0)
ARCHFLAGS-$(call gcc_version_ge,8,0) += -march=armv8.2-a
-mcpu=cortex-a55 -mtune=cortex-a55
+ISR_ARCHFLAGS-$(call gcc_version_ge,8,0) += -march=armv8.2-a
-mcpu=cortex-a55 -mtune=cortex-a55
endif
# GCC support -mcpu=cortex-a75 for arm64 from 8.0
ifeq ($(CONFIG_MARCH_ARM64_CORTEXA75),y)
$(call error_if_gcc_version_lt,8,0)
ARCHFLAGS-$(call gcc_version_ge,8,0) += -march=armv8.2-a
-mcpu=cortex-a75 -mtune=cortex-a75
+ISR_ARCHFLAGS-$(call gcc_version_ge,8,0) += -march=armv8.2-a
-mcpu=cortex-a75 -mtune=cortex-a75
endif
diff --git a/arch/x86/x86_64/Makefile.uk b/arch/x86/x86_64/Makefile.uk
index 0c90a865..3d0b34d6 100644
--- a/arch/x86/x86_64/Makefile.uk
+++ b/arch/x86/x86_64/Makefile.uk
@@ -1,5 +1,7 @@
ARCHFLAGS += -D__X86_64__
ARCHFLAGS += -m64 -mno-red-zone -fno-reorder-blocks
-fno-asynchronous-unwind-tables
+ISR_ARCHFLAGS += -D__X86_64__
+ISR_ARCHFLAGS += -m64 -mno-red-zone -fno-reorder-blocks
-fno-asynchronous-unwind-tables
CINCLUDES += -I$(CONFIG_UK_BASE)/arch/x86/x86_64/include
ASINCLUDES += -I$(CONFIG_UK_BASE)/arch/x86/x86_64/include
@@ -7,20 +9,35 @@ CXXINCLUDES += -I$(CONFIG_UK_BASE)/arch/x86/x86_64/include
# compiler flags to prevent use of extended (FP, SSE, AVX) registers.
# This is for files that contain trap/exception/interrupt handlers
-NO_X86_EXTREGS_FLAGS := -mno-80387 -mno-fp-ret-in-387 -mno-mmx -mno-sse
-mno-avx
+ISR_ARCHFLAGS += -mno-80387 -mno-fp-ret-in-387 -mno-mmx -mno-sse -mno-avx
-mgeneral-regs-only
ARCHFLAGS-$(CONFIG_MARCH_X86_64_GENERIC) += -mtune=generic
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_GENERIC) += -mtune=generic
ARCHFLAGS-$(CONFIG_MARCH_X86_64_NOCONA) += -march=nocona
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_NOCONA) += -march=nocona
ARCHFLAGS-$(CONFIG_MARCH_X86_64_CORE2) += -march=core2
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_CORE2) += -march=core2
ARCHFLAGS-$(CONFIG_MARCH_X86_64_COREI7) += -march=corei7
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_COREI7) += -march=corei7
ARCHFLAGS-$(CONFIG_MARCH_X86_64_COREI7AVX) += -march=corei7-avx
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_COREI7AVX) += -march=corei7-avx
ARCHFLAGS-$(CONFIG_MARCH_X86_64_COREI7AVXI) += -march=core-avx-i
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_COREI7AVXI) += -march=core-avx-i
ARCHFLAGS-$(CONFIG_MARCH_X86_64_ATOM) += -march=atom
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_ATOM) += -march=atom
ARCHFLAGS-$(CONFIG_MARCH_X86_64_K8) += -march=k8
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_K8) += -march=k8
ARCHFLAGS-$(CONFIG_MARCH_X86_64_K8SSE3) += -march=k8-sse3
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_K8SSE3) += -march=k8-sse3
ARCHFLAGS-$(CONFIG_MARCH_X86_64_AMDFAM10) += -march=amdfam10
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_AMDFAM10) += -march=amdfam10
ARCHFLAGS-$(CONFIG_MARCH_X86_64_BDVER1) += -march=bdver1
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_BDVER1) += -march=bdver1
ARCHFLAGS-$(CONFIG_MARCH_X86_64_BDVER2) += -march=bdver2
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_BDVER2) += -march=bdver2
ARCHFLAGS-$(CONFIG_MARCH_X86_64_BDVER3) += -march=bdver3
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_BDVER3) += -march=bdver3
ARCHFLAGS-$(CONFIG_MARCH_X86_64_BTVER1) += -march=btver1
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_BTVER1) += -march=btver1
ARCHFLAGS-$(CONFIG_MARCH_X86_64_BTVER2) += -march=btver2
+ISR_ARCHFLAGS-$(CONFIG_MARCH_X86_64_BTVER2) += -march=btver2
diff --git a/plat/kvm/Makefile.uk b/plat/kvm/Makefile.uk
index 7f07f22f..a6d6f5e7 100644
--- a/plat/kvm/Makefile.uk
+++ b/plat/kvm/Makefile.uk
@@ -43,8 +43,7 @@ endif
## Architecture library definitions for x86_64
##
LIBKVMPLAT_SRCS-$(CONFIG_ARCH_X86_64) +=
$(UK_PLAT_COMMON_BASE)/x86/trace.c|common
-LIBKVMPLAT_SRCS-$(CONFIG_ARCH_X86_64) +=
$(UK_PLAT_COMMON_BASE)/x86/traps.c|common
-LIBKVMPLAT_TRAPS_COMMON_FLAGS += $(NO_X86_EXTREGS_FLAGS)
+LIBKVMPLAT_SRCS-$(CONFIG_ARCH_X86_64) +=
$(UK_PLAT_COMMON_BASE)/x86/traps.c|isr
LIBKVMPLAT_SRCS-$(CONFIG_ARCH_X86_64) +=
$(UK_PLAT_COMMON_BASE)/x86/cpu_features.c|common
LIBKVMPLAT_SRCS-$(CONFIG_ARCH_X86_64) +=
$(UK_PLAT_COMMON_BASE)/x86/cpu_native.c|common
ifeq ($(CONFIG_HAVE_SCHED),y)
diff --git a/support/build/Makefile.rules b/support/build/Makefile.rules
index 8a481e45..af08f830 100644
--- a/support/build/Makefile.rules
+++ b/support/build/Makefile.rules
@@ -126,6 +126,13 @@ $(call vprefix_lib,$(1),$(addprefix $(call
uc,$(basename $(notdir $(2))))_,$(4))
))
endef
+# vprefix_glb $variant,$varname(s)
+# prefixes global variables for reserved variants:
+# '|isr' -> 'ISR_' # reserved variant for code that can be called within
+# # interrupt service routines (e.g., uses only generic
regs)
+# '|.*' -> ''
+# '' -> ''
+vprefix_glb = $(if $(filter isr,$(1)),$(addprefix ISR_,$(2)),$(2))
################################################################################
#
@@ -388,7 +395,7 @@ $(4): $(2) | prepare
$(ASINCLUDES) $(ASINCLUDES-y) \
$($(call vprefix_lib,$(1),ASINCLUDES)) $($(call
vprefix_lib,$(1),ASINCLUDES-y)) \
$($(call vprefix_src,$(1),$(2),$(3),INCLUDES)) $($(call
vprefix_src,$(1),$(2),$(3),INCLUDES-y)) \
- $(ARCHFLAGS) $(ARCHFLAGS-y) \
+ $($(call vprefix_glb,$(3),ARCHFLAGS)) $($(call
vprefix_glb,$(3),ARCHFLAGS-y)) \
$(ASFLAGS) $(ASFLAGS-y) \
$($(call vprefix_lib,$(1),ASFLAGS)) $($(call
vprefix_lib,$(1),ASFLAGS-y)) \
$($(call vprefix_src,$(1),$(2),$(3),FLAGS)) $($(call
vprefix_src,$(1),$(2),$(3),FLAGS-y)) \
@@ -415,7 +422,7 @@ $(4): $(2) | prepare
$(ASINCLUDES) $(ASINCLUDES-y) \
$($(call vprefix_lib,$(1),ASINCLUDES)) $($(call
vprefix_lib,$(1),ASINCLUDES-y)) \
$($(call vprefix_src,$(1),$(2),$(3),INCLUDES)) $($(call
vprefix_src,$(1),$(2),$(3),INCLUDES-y)) \
- $(ARCHFLAGS) $(ARCHFLAGS-y) \
+ $($(call vprefix_glb,$(3),ARCHFLAGS)) $($(call
vprefix_glb,$(3),ARCHFLAGS-y)) \
$(ASFLAGS) $(ASFLAGS-y) \
$($(call vprefix_lib,$(1),ASFLAGS)) $($(call
vprefix_lib,$(1),ASFLAGS-y)) \
$($(call vprefix_src,$(1),$(2),$(3),FLAGS)) $($(call
vprefix_src,$(1),$(2),$(3),FLAGS-y)) \
@@ -440,7 +447,7 @@ $(4): $(2) | prepare
$(CINCLUDES) $(CINCLUDES-y) \
$($(call vprefix_lib,$(1),CINCLUDES)) $($(call
vprefix_lib,$(1),CINCLUDES-y)) \
$($(call vprefix_src,$(1),$(2),$(3),INCLUDES)) $($(call
vprefix_src,$(1),$(2),$(3),INCLUDES-y)) \
- $(ARCHFLAGS) $(ARCHFLAGS-y) \
+ $($(call vprefix_glb,$(3),ARCHFLAGS)) $($(call
vprefix_glb,$(3),ARCHFLAGS-y)) \
$(CFLAGS) $(CFLAGS-y) \
$($(call vprefix_lib,$(1),CFLAGS)) $($(call
vprefix_lib,$(1),CFLAGS-y)) \
$($(call vprefix_src,$(1),$(2),$(3),FLAGS)) $($(call
vprefix_src,$(1),$(2),$(3),FLAGS-y)) \
@@ -464,7 +471,7 @@ $(4): $(2) | prepare
$(CXXINCLUDES) $(CXXINCLUDES-y) \
$($(call vprefix_lib,$(1),CXXINCLUDES)) $($(call
vprefix_lib,$(1),CXXINCLUDES-y)) \
$($(call vprefix_src,$(1),$(2),$(3),INCLUDES)) $($(call
vprefix_src,$(1),$(2),$(3),INCLUDES-y)) \
- $(ARCHFLAGS) $(ARCHFLAGS-y) \
+ $($(call vprefix_glb,$(3),ARCHFLAGS)) $($(call
vprefix_glb,$(3),ARCHFLAGS-y)) \
$(CXXFLAGS) $(CXXFLAGS-y) \
$($(call vprefix_lib,$(1),CXXFLAGS)) $($(call
vprefix_lib,$(1),CXXFLAGS-y)) \
$($(call vprefix_src,$(1),$(2),$(3),FLAGS)) $($(call
vprefix_src,$(1),$(2),$(3),FLAGS-y)) \
@@ -496,7 +503,7 @@ $(4): $(2) | prepare
$(GOCINCLUDES) $(GOCINCLUDES-y) \
$($(call vprefix_lib,$(1),GOCINCLUDES)) $($(call
vprefix_lib,$(1),GOCINCLUDES-y)) \
$($(call vprefix_src,$(1),$(2),$(3),INCLUDES)) $($(call
vprefix_src,$(1),$(2),$(3),INCLUDES-y)) \
- $(ARCHFLAGS) $(ARCHFLAGS-y) \
+ $($(call vprefix_glb,$(3),ARCHFLAGS)) $($(call
vprefix_glb,$(3),ARCHFLAGS-y)) \
$(GOCFLAGS) $(GOCFLAGS-y) \
$($(call vprefix_lib,$(1),GOCFLAGS)) $($(call
vprefix_lib,$(1),GOCFLAGS-y)) \
$($(call vprefix_src,$(1),$(2),$(3),FLAGS)) $($(call
vprefix_src,$(1),$(2),$(3),FLAGS-y)) \
--
2.20.1
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