Re: [Minios-devel] [PATCH 1/2] enable rtc pl031 for arm

[Jianyong Wu <Jianyong.Wu@xxxxxxx>]

Hi,

Any comments for this?

Thanks
Jianyong

> -----Original Message-----
> From: Jianyong Wu <jianyong.wu@xxxxxxx>
> Sent: Sunday, November 17, 2019 12:10 PM
> To: minios-devel@xxxxxxxxxxxxxxxxxxxx; sharan.santhanam@xxxxxxxxx;
> simon.kuenzer@xxxxxxxxx; Santiago.Pagani@xxxxxxxxx
> Cc: Justin He (Arm Technology China) <Justin.He@xxxxxxx>; Jianyong Wu
> (Arm Technology China) <Jianyong.Wu@xxxxxxx>
> Subject: [PATCH 1/2] enable rtc pl031 for arm
>
> Currently, as rtc is not enabled in arm, wall time can't be offered currectly.
> pl031 is chosen as the rtc device for arm.
> Nearly all of the function the device offers has been implemented.
> ---
>  plat/common/arm/rtc.c     | 144
> ++++++++++++++++++++++++++++++++++++++
>  plat/common/include/rtc.h |  45 ++++++++++++
>  plat/kvm/Makefile.uk      |   1 +
>  plat/kvm/arm/setup.c      |   3 +
>  4 files changed, 193 insertions(+)
>  create mode 100644 plat/common/arm/rtc.c  create mode 100644
> plat/common/include/rtc.h
>
> diff --git a/plat/common/arm/rtc.c b/plat/common/arm/rtc.c new file mode
> 100644 index 0000000..73a2716
> --- /dev/null
> +++ b/plat/common/arm/rtc.c
> @@ -0,0 +1,144 @@
> +/* SPDX-License-Identifier: BSD-3-Clause */
> +/*
> + * Authors: Wei Chen <Wei.Chen@xxxxxxx>
> + *          Jianyong Wu <Jianyong.Wu@xxxxxxx>
> + *
> + * Copyright (c) 2018, Arm Ltd. All rights reserved.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + *    notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + *    notice, this list of conditions and the following disclaimer in the
> + *    documentation and/or other materials provided with the distribution.
> + * 3. Neither the name of the copyright holder nor the names of its
> + *    contributors may be used to endorse or promote products derived from
> + *    this software without specific prior written permission.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
> CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> LIMITED
> +TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
> PARTICULAR
> +PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
> +CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
> OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
> PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
> +BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
> WHETHER
> +IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
> +OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
> ADVISED
> +OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + *
> + * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
> + */
> +#include <string.h>
> +#include <libfdt.h>
> +#include <uk/assert.h>
> +#include <uk/essentials.h>
> +#include <uk/print.h>
> +#include <arm/cpu.h>
> +#include <ofw/fdt.h>
> +#include <stdio.h>
> +
> +static uint64_t rtc_base_addr;
> +uint32_t rtc_boot_seconds;
> +
> +/* Define offset of RTC registers */
> +#define RTC_REG_DR0
> +#define RTC_REG_MR0x4
> +#define RTC_REG_LR0x8
> +#define RTC_REG_CR0xc
> +#define RTC_REG_IMSC0x10
> +#define RTC_REG_RIS0x14
> +#define RTC_REG_MIS0x18
> +#define RTC_REG_ICR0x1c
> +
> +#define RTC_REG(r)(rtc_base_addr + (r))
> +
> +static const char *rtc_device_list[] = {
> +"arm,pl031",
> +};
> +
> +static uint32_t rtc_read(void)
> +{
> +return ioreg_read32(RTC_REG(RTC_REG_DR));
> +}
> +
> +/*
> + * set rtc match register comparing with counter
> + * value to generat a interrupt
> + */
> +void rtc_set_match(uint32_t alam)
> +{
> +ioreg_write32(RTC_REG(RTC_REG_MR), alam); }
> +
> +void rtc_update(uint32_t val)
> +{
> +ioreg_write32(RTC_REG(RTC_REG_LR), val); }
> +
> +void rtc_enable(void)
> +{
> +ioreg_write32(RTC_REG(RTC_REG_CR), 1); }
> +
> +/* return rtc status, 1 denotes enable and 0 denotes disable */
> +uint32_t rtc_get_status(void) {
> +uint32_t val;
> +
> +val = ioreg_read32(RTC_REG(RTC_REG_CR));
> +val &= 0x1;
> +return val;
> +}
> +
> +/* mask alam */
> +void rtc_mask_intr(void)
> +{
> +ioreg_write32(RTC_REG(RTC_REG_IMSC), 1); }
> +
> +/* clear alam mask */
> +void rtc_unmask_intr(void)
> +{
> +ioreg_write32(RTC_REG(RTC_REG_IMSC), 0); }
> +
> +/* return the raw state of rtc interrupt before masking*/ uint32_t
> +rtc_get_intr_raw_state(void) {
> +return ioreg_read32(RTC_REG(RTC_REG_RIS));
> +}
> +
> +/* return interrupt state after interrupt masking */ uint32_t
> +rtc_get_intr_state(void) {
> +return ioreg_read32(RTC_REG(RTC_REG_MIS));
> +}
> +
> +void rtc_clear_intr(void)
> +{
> +ioreg_write32(RTC_REG(RTC_REG_ICR), 1); }
> +
> +void _dtb_init_rtc(void *dtb)
> +{
> +uint64_t size;
> +int fdt_rtc, ret;
> +
> +uk_pr_info("Probing RTC...\n");
> +fdt_rtc = fdt_node_offset_by_compatible_list(dtb, -1, rtc_device_list);
> +if (fdt_rtc < 0)
> +UK_CRASH("Could not find rtc device!\n");
> +
> +ret = fdt_get_address(dtb, fdt_rtc, 0, &rtc_base_addr, &size);
> +if (ret < 0)
> +UK_CRASH("Could not get rtc address\n");
> +
> +/* Record the boot seconds */
> +rtc_boot_seconds = rtc_read();
> +
> +uk_pr_info("Found RTC on: %p\n", rtc_base_addr); }
> diff --git a/plat/common/include/rtc.h b/plat/common/include/rtc.h new file
> mode 100644 index 0000000..b764c32
> --- /dev/null
> +++ b/plat/common/include/rtc.h
> @@ -0,0 +1,45 @@
> +/* SPDX-License-Identifier: BSD-3-Clause */
> +/*
> + * Authors: Wei Chen <Wei.Chen@xxxxxxx>
> + *          Jianyong Wu <Jianyong.Wu@xxxxxxx>
> + *
> + * Copyright (c) 2019, Arm Ltd. All rights reserved.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + *
> + * 1. Redistributions of source code must retain the above copyright
> + *    notice, this list of conditions and the following disclaimer.
> + * 2. Redistributions in binary form must reproduce the above copyright
> + *    notice, this list of conditions and the following disclaimer in the
> + *    documentation and/or other materials provided with the distribution.
> + * 3. Neither the name of the copyright holder nor the names of its
> + *    contributors may be used to endorse or promote products derived from
> + *    this software without specific prior written permission.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
> CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> LIMITED
> +TO, THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
> PARTICULAR
> +PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
> +CONTRIBUTORS BE
> + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
> OR
> + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
> PROCUREMENT OF
> + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
> +BUSINESS
> + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
> WHETHER
> +IN
> + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
> +OTHERWISE)
> + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
> ADVISED
> +OF THE
> + * POSSIBILITY OF SUCH DAMAGE.
> + *
> + * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
> + */
> +
> +#ifndef __PLAT_CMN_ARM_RTC_H__
> +#define __PLAT_CMN_ARM_RTC_H__
> +
> +#include <stdint.h>
> +
> +extern uint32_t rtc_boot_seconds;
> +
> +int _dtb_init_rtc(void *dtb);
> +
> +#endif //__PLAT_CMN_ARM_GICV2_H__
> diff --git a/plat/kvm/Makefile.uk b/plat/kvm/Makefile.uk index
> c900d45..23187fb 100644
> --- a/plat/kvm/Makefile.uk
> +++ b/plat/kvm/Makefile.uk
> @@ -74,6 +74,7 @@ endif
>  ifeq ($(findstring y,$(CONFIG_KVM_KERNEL_SERIAL_CONSOLE)
> $(CONFIG_KVM_DEBUG_SERIAL_CONSOLE)),y)
>  LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
> $(UK_PLAT_COMMON_BASE)/arm/pl011.c|common
>  endif
> +LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
> +$(UK_PLAT_COMMON_BASE)/arm/rtc.c|common
>  LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
> $(UK_PLAT_COMMON_BASE)/arm/cpu_native.c|common
>  LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
> $(UK_PLAT_COMMON_BASE)/arm/cache64.S|common
>  LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
> $(UK_PLAT_COMMON_BASE)/arm/psci_arm64.S|common
> diff --git a/plat/kvm/arm/setup.c b/plat/kvm/arm/setup.c index
> 3046646..b20bb79 100644
> --- a/plat/kvm/arm/setup.c
> +++ b/plat/kvm/arm/setup.c
> @@ -221,6 +221,9 @@ void _libkvmplat_start(void *dtb_pointer)
>  /* Initialize memory from DTB */
>  _init_dtb_mem();
>
> +/* Initialize rtc */
> +_dtb_init_rtc(dtb_pointer);
> +
>  /* Initialize interrupt controller */
>  intctrl_init();
>
> --
> 2.17.1

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