[Minios-devel] [UNIKRAFT PATCH 5/6] plat/common: Initialize `syscall`/`sysret` for x86

[Simon Kuenzer <simon.kuenzer@xxxxxxxxx>]

_init_syscall() checks if CPU has `syscall`/`sysret` support is
available and enables it. The CPU is programmed to call
`_ukplat_syscall()` handler in the event of `syscall`. A trap handler
is implemented with the following patch(es).

Signed-off-by: Simon Kuenzer <simon.kuenzer@xxxxxxxxx>
---
 plat/common/include/x86/cpu.h      | 65 ++++++++++++++++++++++++++++++
 plat/common/include/x86/cpu_defs.h | 22 ++++++++++
 2 files changed, 87 insertions(+)

diff --git a/plat/common/include/x86/cpu.h b/plat/common/include/x86/cpu.h
index 120eb86d..5f1a35e4 100644
--- a/plat/common/include/x86/cpu.h
+++ b/plat/common/include/x86/cpu.h
@@ -276,4 +276,69 @@ static inline __u64 mul64_32(__u64 a, __u32 b)
        return prod;
 }
 
+#ifdef CONFIG_HAVE_SYSCALL
+/* syscall entrance provided by platform library */
+void _ukplat_syscall(void);
+
+/* _init_syscall is derived from hermitux: `processor.c`:
+ *
+ * Copyright (c) 2010, Stefan Lankes, RWTH Aachen University
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *    * Redistributions of source code must retain the above copyright
+ *      notice, this list of conditions and the following disclaimer.
+ *    * Redistributions in binary form must reproduce the above copyright
+ *      notice, this list of conditions and the following disclaimer in the
+ *      documentation and/or other materials provided with the distribution.
+ *    * Neither the name of the University nor the names of its contributors
+ *      may be used to endorse or promote products derived from this
+ *      software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+static inline void _init_syscall(void)
+{
+       __u32 eax, ebx, ecx, edx;
+       int have_syscall = 0;
+
+       /* Check for availability of extended features */
+       cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
+       if (eax >= 0x80000001) {
+               cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
+               have_syscall = (edx & X86_CPUID3_SYSCALL);
+       }
+
+       if (!have_syscall)
+               UK_CRASH("CPU does not support SYSCALL/SYSRET!\n");
+
+       /* Enable and program syscall/sysret */
+       wrmsrl(X86_MSR_EFER,
+              rdmsrl(X86_MSR_EFER)
+              | X86_EFER_LMA | X86_EFER_LME | X86_EFER_SCE);
+       wrmsrl(X86_MSR_STAR,
+              (0x08ULL << 48) | (0x08ULL << 32));
+       wrmsrl(X86_MSR_LSTAR,
+              (__uptr) _ukplat_syscall);
+
+       /* Clear IF flag during an interrupt */
+       wrmsrl(X86_MSR_SYSCALL_MASK,
+              X86_EFLAGS_TF | X86_EFLAGS_DF | X86_EFLAGS_IF
+              | X86_EFLAGS_AC | X86_EFLAGS_NT);
+
+       uk_pr_info("SYSCALL entrance @ %p\n", _ukplat_syscall);
+}
+#endif /* CONFIG_HAVE_SYSCALL */
+
 #endif /* __PLAT_COMMON_X86_CPU_H__ */
diff --git a/plat/common/include/x86/cpu_defs.h 
b/plat/common/include/x86/cpu_defs.h
index f46e8307..dcbe2c65 100644
--- a/plat/common/include/x86/cpu_defs.h
+++ b/plat/common/include/x86/cpu_defs.h
@@ -88,6 +88,8 @@
 #define X86_CPUID7_EBX_FSGSBASE (1 << 0)
 /* CPUID feature bits when EAX=0xd, ECX=1 */
 #define X86_CPUIDD1_EAX_XSAVEOPT (1<<0)
+/* CPUID 80000001H:EDX feature list */
+#define X86_CPUID3_SYSCALL      (1 << 11)
 
 /*
  * Extended Control Register 0 (XCR0)
@@ -100,5 +102,25 @@
  * Model-specific register addresses
  */
 #define X86_MSR_FS_BASE         0xc0000100
+/* extended feature register */
+#define X86_MSR_EFER           0xc0000080
+/* legacy mode SYSCALL target */
+#define X86_MSR_STAR           0xc0000081
+/* long mode SYSCALL target */
+#define X86_MSR_LSTAR          0xc0000082
+/* compat mode SYSCALL target */
+#define X86_MSR_CSTAR          0xc0000083
+/* EFLAGS mask for syscall */
+#define X86_MSR_SYSCALL_MASK   0xc0000084
+
+/* MSR EFER bits */
+#define X86_EFER_SCE           (1 << 0)
+#define X86_EFER_LME           (1 << 8)
+#define X86_EFER_LMA           (1 << 10)
+#define X86_EFER_NXE           (1 << 11)
+#define X86_EFER_SVME          (1 << 12)
+#define X86_EFER_LMSLE         (1 << 13)
+#define X86_EFER_FFXSR         (1 << 14)
+#define X86_EFER_TCE           (1 << 15)
 
 #endif /* __PLAT_CMN_X86_CPU_DEFS_H__ */
-- 
2.20.1


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