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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Minios-devel] [UNIKRAFT PATCH v6 7/7] plat/common: Split arch specific codes from time.c to arm{, 64}/time.h
Reviewed-by: Santiago Pagani <santiago.pagani@xxxxxxxxx>
On 09.10.19, 15:02, "Jia He" <justin.he@xxxxxxx> wrote:
The previous time.c is for arm64 only, so split arch specific codes from
time.c to different directories.
No functional changes in this patch.
Signed-off-by: Jia He <justin.he@xxxxxxx>
---
plat/common/arm/time.c | 72 +++++++++++++---------------
plat/common/include/arm/arm/time.h | 43 +++++++++++++++++
plat/common/include/arm/arm64/time.h | 45 +++++++++++++++++
plat/common/include/arm/time.h | 15 ++++++
4 files changed, 135 insertions(+), 40 deletions(-)
create mode 100644 plat/common/include/arm/arm/time.h
create mode 100644 plat/common/include/arm/arm64/time.h
create mode 100644 plat/common/include/arm/time.h
diff --git a/plat/common/arm/time.c b/plat/common/arm/time.c
index bb8a096..56d9d6e 100644
--- a/plat/common/arm/time.c
+++ b/plat/common/arm/time.c
@@ -43,11 +43,7 @@
#include <ofw/gic_fdt.h>
#include <irq.h>
#include <gic/gic-v2.h>
-
-/* Bits definition of cntv_ctl_el0 register */
-#define GT_TIMER_ENABLE 0x01
-#define GT_TIMER_MASK_IRQ 0x02
-#define GT_TIMER_IRQ_STATUS 0x04
+#include <arm/time.h>
/* TODO: For now this file is KVM dependent. As soon as we have more
* Arm platforms that are using this file, we need to introduce a
@@ -150,8 +146,7 @@ static void calculate_mult_shift(uint32_t *mult,
uint8_t *shift,
static inline void generic_timer_enable(void)
{
- SYSREG_WRITE32(cntv_ctl_el0,
- SYSREG_READ32(cntv_ctl_el0) | GT_TIMER_ENABLE);
+ set_el0(cntv_ctl, get_el0(cntv_ctl) | GT_TIMER_ENABLE);
/* Ensure the write of sys register is visible */
isb();
@@ -159,8 +154,7 @@ static inline void generic_timer_enable(void)
static inline void generic_timer_disable(void)
{
- SYSREG_WRITE32(cntv_ctl_el0,
- SYSREG_READ32(cntv_ctl_el0) & ~GT_TIMER_ENABLE);
+ set_el0(cntv_ctl, get_el0(cntv_ctl) & ~GT_TIMER_ENABLE);
/* Ensure the write of sys register is visible */
isb();
@@ -168,8 +162,7 @@ static inline void generic_timer_disable(void)
static inline void generic_timer_mask_irq(void)
{
- SYSREG_WRITE32(cntv_ctl_el0,
- SYSREG_READ32(cntv_ctl_el0) | GT_TIMER_MASK_IRQ);
+ set_el0(cntv_ctl, get_el0(cntv_ctl) | GT_TIMER_MASK_IRQ);
/* Ensure the write of sys register is visible */
isb();
@@ -177,8 +170,7 @@ static inline void generic_timer_mask_irq(void)
static inline void generic_timer_unmask_irq(void)
{
- SYSREG_WRITE32(cntv_ctl_el0,
- SYSREG_READ32(cntv_ctl_el0) & (~GT_TIMER_MASK_IRQ));
+ set_el0(cntv_ctl, get_el0(cntv_ctl) & ~GT_TIMER_MASK_IRQ);
/* Ensure the write of sys register is visible */
isb();
@@ -186,12 +178,37 @@ static inline void generic_timer_unmask_irq(void)
static inline void generic_timer_update_compare(uint64_t new_val)
{
- SYSREG_WRITE64(cntv_cval_el0, new_val);
+ set_el0(cntv_cval, new_val);
/* Ensure the write of sys register is visible */
isb();
}
+#ifdef CONFIG_ARM64_ERRATUM_858921
+/*
+ * The errata #858921 describes that Cortex-A73 (r0p0 - r0p2) counter
+ * read can return a wrong value when the counter crosses a 32bit boundary.
+ * But newer Cortex-A73 are not affected.
+ *
+ * The workaround involves performing the read twice, compare bit[32] of
+ * the two read values. If bit[32] is different, keep the first value,
+ * otherwise keep the second value.
+ */
+static uint64_t generic_timer_get_ticks(void)
+{
+ uint64_t val_1st, val_2nd;
+
+ val_1st = get_el0(cntvct);
+ val_2nd = get_el0(cntvct);
+ return (((val_1st ^ val_2nd) >> 32) & 1) ? val_1st : val_2nd;
+}
+#else
+static inline uint64_t generic_timer_get_ticks(void)
+{
+ return get_el0(cntvct);
+}
+#endif
+
static uint32_t generic_timer_get_frequency(int fdt_timer)
{
int len;
@@ -208,37 +225,12 @@ static uint32_t generic_timer_get_frequency(int
fdt_timer)
uk_pr_info("No clock-frequency found, reading from register
directly.\n");
/* No workaround, get from register directly */
- return SYSREG_READ32(cntfrq_el0);
+ return get_el0(cntfrq);
}
return fdt32_to_cpu(fdt_freq[0]);
}
-#ifdef CONFIG_ARM64_ERRATUM_858921
-/*
- * The errata #858921 describes that Cortex-A73 (r0p0 - r0p2) counter
- * read can return a wrong value when the counter crosses a 32bit boundary.
- * But newer Cortex-A73 are not affected.
- *
- * The workaround involves performing the read twice, compare bit[32] of
- * the two read values. If bit[32] is different, keep the first value,
- * otherwise keep the second value.
- */
-static uint64_t generic_timer_get_ticks(void)
-{
- uint64_t val_1st, val_2nd;
-
- val_1st = SYSREG_READ64(cntvct_el0);
- val_2nd = SYSREG_READ64(cntvct_el0);
- return (((val_1st ^ val_2nd) >> 32) & 1) ? val_1st : val_2nd;
-}
-#else
-static inline uint64_t generic_timer_get_ticks(void)
-{
- return SYSREG_READ64(cntvct_el0);
-}
-#endif
-
/*
* monotonic_clock(): returns # of nanoseconds passed since
* generic_timer_time_init()
diff --git a/plat/common/include/arm/arm/time.h
b/plat/common/include/arm/arm/time.h
new file mode 100644
index 0000000..baff7bf
--- /dev/null
+++ b/plat/common/include/arm/arm/time.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Wei Chen <Wei.Chen@xxxxxxx>
+ *
+ * Copyright (c) 2019, Arm Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS
BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+#ifndef UK_PLAT_COMMON_ARM_TIME_H
+#define UK_PLAT_COMMON_ARM_TIME_H
+
+#define get_el0(x) cp15_## x ##_get()
+#define get_el1(x) cp15_## x ##_get()
+#define set_el0(x, val) cp15_## x ##_set(val)
+#define set_el1(x, val) cp15_## x ##_set(val)
+
+#endif
+
diff --git a/plat/common/include/arm/arm64/time.h
b/plat/common/include/arm/arm64/time.h
new file mode 100644
index 0000000..95c7e7a
--- /dev/null
+++ b/plat/common/include/arm/arm64/time.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Wei Chen <Wei.Chen@xxxxxxx>
+ *
+ * Copyright (c) 2019, Arm Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS
BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+#ifndef UK_PLAT_COMMON_ARM64_TIME_H
+#define UK_PLAT_COMMON_ARM64_TIME_H
+
+#include <uk/plat/lcpu.h>
+#include <cpu.h>
+
+#define get_el0(x) SYSREG_READ64(x ##_el0)
+#define get_el1(x) SYSREG_READ64(x ##_el1)
+#define set_el0(x, val) SYSREG_WRITE64(x ##_el0, val)
+#define set_el1(x, val) SYSREG_WRITE64(x ##_el1, val)
+
+#endif /* UK_PLAT_COMMON_ARM64_TIME_H */
diff --git a/plat/common/include/arm/time.h b/plat/common/include/arm/time.h
new file mode 100644
index 0000000..3eed7b9
--- /dev/null
+++ b/plat/common/include/arm/time.h
@@ -0,0 +1,15 @@
+#ifndef __ARM_ARM_TIME_H
+#define __ARM_ARM_TIME_H
+
+/* Bits definition of cntv_ctl register */
+#define GT_TIMER_ENABLE 0x01
+#define GT_TIMER_MASK_IRQ 0x02
+#define GT_TIMER_IRQ_STATUS 0x04
+
+#ifdef CONFIG_ARCH_ARM_64
+#include <arm/arm64/time.h>
+#else
+#include <arm/arm/time.h>
+#endif /* CONFIG_ARCH_ARM_64 */
+
+#endif /* __ARM_ARM_TIME_H */
--
2.17.1
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