[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Minios-devel] [UNIKRAFT early RFC PATCH 07/11] plat/kvm: arm64: Add entry point for APs (secondary cpus)
Hi, On 21/06/2019 07:57, Jia He wrote: Signed-off-by: Jia He <justin.he@xxxxxxx> --- plat/kvm/arm/entry64.S | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/plat/kvm/arm/entry64.S b/plat/kvm/arm/entry64.S index df59ef6..9c98102 100644 --- a/plat/kvm/arm/entry64.S +++ b/plat/kvm/arm/entry64.S @@ -143,3 +143,33 @@ ENTRY(_libkvmplat_newstack) /* Branch to _libkvmplat_entry2 */ br x1 END(_libkvmplat_newstack) + +/* + * mpentry(unsigned long) + * + * Called by a core when it is being brought online. + * The data in x0 is passed straight to init_secondary. + */ +ENTRY(mpentry) + /* Disable interrupts */ + msr daifset, #2 Technically you should mask all the interrupts (debug, SError, Interrupt, FIQ) until you have configured the vector table correctly. But I am pretty sure you would arrive here with all interrupts masked. + + /* Set the context id */ + msr contextidr_el1, xzr + + /* Enable the mmu */ + mov x7, #1 See my comment about x7 before. + bl start_mmu + + /* Jump to the virtual address space */ + ldr x15, =mp_virtdone + br x15 I thought Unikraft page tables were configured with virt == phys mapping. So do you really need this? + +mp_virtdone: + ldr x4, =secondary_stacks + mov x5, #(4096 * 4)//TODO What's that for? + mul x5, x0, x5 + add sp, x4, x5 + + b init_secondary +END(mpentry) Cheers, -- Julien Grall _______________________________________________ Minios-devel mailing list Minios-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/minios-devel
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