Re: [Minios-devel] [UNIKRAFT PATCH 7/7] plat/common: Add a trap function to handle Arm64 irq trap

[Sharan Santhanam <sharan.santhanam@xxxxxxxxx>]

Hello,

Please find the comments inline:

Thanks & Regards
Sharan

On 12/13/18 10:19 AM, Wei Chen wrote:
> As we have implemented the GICv2 interrupt controller, we
> can enable the irq trap exception handler in exception entry.
>
> Signed-off-by: Wei Chen <wei.chen@xxxxxxx>
> Signed-off-by: Jianyong Wu <jianyong.wu@xxxxxxx>
> ---
>   plat/common/arm/gic-v2.c         | 24 ++++++++++++++++++++++++
>   plat/common/arm/traps.c          |  6 ++++++
>   plat/common/include/arm/gic-v2.h |  3 +++
>   plat/kvm/arm/exceptions.S        | 10 +++++++++-
>   4 files changed, 42 insertions(+), 1 deletion(-)
>
> diff --git a/plat/common/arm/gic-v2.c b/plat/common/arm/gic-v2.c
> index 87e8168..11bfaef 100644
> --- a/plat/common/arm/gic-v2.c
> +++ b/plat/common/arm/gic-v2.c
> @@ -325,6 +325,30 @@ int gic_irq_translate(int type, int hw_irq)
>           return -EINVAL;
>   }
>   
> +void gic_handle_irq(void)
> +{
> +       uint32_t stat, irq;
> +
> +       do {
> +               stat = gic_ack_irq();
> +               irq = stat & GICC_IAR_INTID_MASK;

s/uk_printd/uk_pr_info
Is this a critical error or info since it an interrupt handler?

> +
> +               uk_printd(DLVL_CRIT, "Unikraft: EL1 IRQ#%d trap caught\n", irq);
> +
> +               /*
s/Hanle/Handle
> +                * TODO: Hanle IPI&SGI interrupts here
> +                */
> +               if (irq < GIC_MAX_IRQ) {
> +                       isb();
> +                       _ukplat_irq_handle((unsigned long)irq);
> +                       gic_eoi_irq(stat);
> +                       continue;
> +               }
> +
> +               break;
> +       } while (1);
> +}
> +
>   static void gic_init_dist(void)
>   {
>         uint32_t val, cpuif_number, irq_number;
> diff --git a/plat/common/arm/traps.c b/plat/common/arm/traps.c
> index 43235be..ef142dc 100644
> --- a/plat/common/arm/traps.c
> +++ b/plat/common/arm/traps.c
> @@ -23,6 +23,7 @@
>   #include <string.h>
>   #include <uk/print.h>
>   #include <uk/assert.h>
> +#include <arm/gic-v2.h>
>   
>   static const char *exception_modes[]= {
>         "Synchronous Abort",
> @@ -68,3 +69,8 @@ void trap_el1_sync(struct __regs *regs, uint64_t far)
>         dump_registers(regs, far);
>         ukplat_crash();
>   }
> +
> +void trap_el1_irq(void)
> +{
> +       gic_handle_irq();
> +}
> diff --git a/plat/common/include/arm/gic-v2.h b/plat/common/include/arm/gic-v2.h
> index 7412a4f..2cfab4c 100644
> --- a/plat/common/include/arm/gic-v2.h
> +++ b/plat/common/include/arm/gic-v2.h
> @@ -362,6 +362,9 @@ int gic_is_irq_active(uint32_t irq);
>   /* Config intrrupt trigger type and polarity */
>   void gic_set_irq_type(uint32_t irq, int trigger, int polarity);
>   
> +/* Handle IRQ entry */
> +void gic_handle_irq(void);
> +
>   /* Initialize GICv2 from device tree */
>   int _dtb_init_gic(const void *fdt);
>   
> diff --git a/plat/kvm/arm/exceptions.S b/plat/kvm/arm/exceptions.S
> index 3fafb40..8a8c5c5 100644
> --- a/plat/kvm/arm/exceptions.S
> +++ b/plat/kvm/arm/exceptions.S
> @@ -164,6 +164,14 @@ el1_sync:
>         bl trap_el1_sync
>         LEAVE_TRAP 1
>   
> +.align 6
> +el1_irq:
> +       ENTER_TRAP 1
Shouldn't it be #(8| 4 |1)
> +       msr daifclr, #4
> +       mov x0, sp
> +       bl trap_el1_irq
> +       LEAVE_TRAP 1
> +
>   /* Bad Abort numbers */
>   #define BAD_SYNC  0
>   #define BAD_IRQ   1
> @@ -214,7 +222,7 @@ ENTRY(vector_table)
>   
>   	/* Current Exception level with SP_EL1 */
>         vector_entry el1_sync           /* Synchronous EL1h       */
> -       vector_entry el1_irq_invalid    /* IRQ EL1h               */
> +       vector_entry el1_irq            /* IRQ EL1h               */
>         vector_entry el1_fiq_invalid    /* FIQ EL1h               */
>         vector_entry el1_error_invalid  /* Error EL1h             */
>   
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