From: Wei Chen <Wei.Chen@xxxxxxx>
Halts the CPU until the next external interrupt is fired.
For Arm, we can use WFI to implement this feature.
Signed-off-by: Wei Chen <Wei.Chen@xxxxxxx>
---
plat/common/arm/cpu_native.c | 45 +++++++++++++++++++++++++++++
plat/common/include/arm/arm64/cpu.h | 3 ++
plat/kvm/Makefile.uk | 1 +
3 files changed, 49 insertions(+)
create mode 100644 plat/common/arm/cpu_native.c
diff --git a/plat/common/arm/cpu_native.c b/plat/common/arm/cpu_native.c
new file mode 100644
index 0000000..2d1a1aa
--- /dev/null
+++ b/plat/common/arm/cpu_native.c
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Wei Chen <wei.chen@xxxxxxx>
+ *
+ * Copyright (c) 2018, Arm Ltd., All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+#include <arm/cpu.h>
+#include <arm/cpu_defs.h>
+#include <uk/assert.h>
+
+/*
+ * Halts the CPU until the next external interrupt is fired. For Arm,
+ * we can use WFI to implement this feature.
+ */
+void halt(void)
+{
+ __asm__ __volatile__("wfi");
+}
diff --git a/plat/common/include/arm/arm64/cpu.h
b/plat/common/include/arm/arm64/cpu.h
index cd2c257..b231d32 100644
--- a/plat/common/include/arm/arm64/cpu.h
+++ b/plat/common/include/arm/arm64/cpu.h
@@ -99,3 +99,6 @@ typedef int (*smcc_psci_callfn_t)(uint32_t, uint64_t,
uint64_t, uint64_t);
extern smcc_psci_callfn_t smcc_psci_call;
int32_t smcc_psci_hvc_call(uint32_t, uint64_t, uint64_t, uint64_t);
int32_t smcc_psci_smc_call(uint32_t, uint64_t, uint64_t, uint64_t);
+
+/* CPU native APIs */
+void halt(void);
diff --git a/plat/kvm/Makefile.uk b/plat/kvm/Makefile.uk
index 001044b..33941f7 100644
--- a/plat/kvm/Makefile.uk
+++ b/plat/kvm/Makefile.uk
@@ -53,6 +53,7 @@ ifeq ($(CONFIG_ARCH_ARM_64),y)
ifeq ($(findstring y,$(CONFIG_KVM_KERNEL_SERIAL_CONSOLE)
$(CONFIG_KVM_DEBUG_SERIAL_CONSOLE)),y)
LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
$(UK_PLAT_COMMON_BASE)/arm/console.c|common
endif
+LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
$(UK_PLAT_COMMON_BASE)/arm/cpu_native.c|common
LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
$(UK_PLAT_COMMON_BASE)/arm/cache64.S|common
LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
$(UK_PLAT_COMMON_BASE)/arm/psci_arm64.S|common
LIBKVMPLAT_SRCS-$(CONFIG_ARCH_ARM_64) +=
$(UK_PLAT_COMMON_BASE)/arm/time.c|common
