[Minios-devel] [UNIKRAFT PATCHv5 17/46] plat/kvm: Add linker script for Arm64

[Wei Chen <wei.chen@xxxxxxx>]

From: Wei Chen <Wei.Chen@xxxxxxx>

This link script is based on x86 version, except following
differences:
1. Arm64 needs DTB to parse devices, and QEMU/KVM will reserved
   the first 1MB of RAM as DTB area[1][2]. In this case, we add
   a DTB section to this link script. You can find Arm64 QEMU/KVM
   memory layout and DTB load address in [3].
2. We will use mmu to control each section's attribute, so the
   boundaries of sections with different memory attributes must
   be 4KiB alignment. For instance, the dtb section is readonly,
   but the text section is readonly+exec. So the _text must start
   at a 4KiB alignment address.

[1]https://github.com/qemu/qemu/blob/master/device_tree.c
[2]https://git.qemu.org/?p=qemu.git;a=commit;h=14ec3cbd7c1e31dca4d23f028100c8f43e156573
[3]https://github.com/qemu/qemu/blob/master/hw/arm/virt.c

Signed-off-by: Wei Chen <Wei.Chen@xxxxxxx>
---
 plat/kvm/arm/link64.lds.S | 124 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 124 insertions(+)
 create mode 100644 plat/kvm/arm/link64.lds.S

diff --git a/plat/kvm/arm/link64.lds.S b/plat/kvm/arm/link64.lds.S
new file mode 100644
index 0000000..adca4e7
--- /dev/null
+++ b/plat/kvm/arm/link64.lds.S
@@ -0,0 +1,124 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+/*
+ * Authors: Wei Chen <wei.chen@xxxxxxx>
+ *
+ * Copyright (c) 2018, Arm Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from
+ *    this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * THIS HEADER MAY NOT BE EXTRACTED OR MODIFIED IN ANY WAY.
+ */
+#include <uk/arch/limits.h>
+
+/* QEMU-AArch64 virt platform's ram base address */
+#define RAM_BASE_ADDR 0x40000000
+
+/* Reserve first 1MB for DTB */
+#define DTB_RESERVED_SIZE 0x100000
+
+OUTPUT_FORMAT("elf64-littleaarch64")
+OUTPUT_ARCH(aarch64)
+ENTRY(_libkvmplat_entry)
+
+/*
+ * We use mmu to control each section's attribute, so the boundaries
+ * of sections with different memory attributes must be 4KiB alignment.
+ * For instance, the dtb section is readonly, but the text section
+ * is readonly+exec. So the _text must start at a 4KiB alignment
+ * address.
+ */
+SECTIONS {
+       . = RAM_BASE_ADDR;
+
+       /* Place DTB binary at the beginning of the RAM */
+       _dtb = .;
+       . = . + DTB_RESERVED_SIZE;
+
+       /* Code */
+       _text = .;
+       .text :
+       {
+               *(.text)
+               *(.text.*)
+       }
+
+       . = ALIGN(__PAGE_SIZE);
+       _etext = .;
+
+       /* Read-only data */
+       _rodata = .;
+       .rodata :
+       {
+               *(.rodata)
+               *(.rodata.*)
+       }
+       .eh_frame :
+       {
+               *(.eh_frame)
+       }
+       _erodata = .;
+
+       /* Constructor tables (read-only) */
+       _ctors = .;
+       .preinit_array : {
+               . = ALIGN(0x8);
+               PROVIDE_HIDDEN (__preinit_array_start = .);
+               KEEP (*(.preinit_array))
+               PROVIDE_HIDDEN (__preinit_array_end = .);
+       }
+
+       .init_array : {
+               . = ALIGN(0x8);
+               PROVIDE_HIDDEN (__init_array_start = .);
+               KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) 
SORT_BY_INIT_PRIORITY(.ctors.*)))
+               KEEP (*(.init_array .ctors))
+               PROVIDE_HIDDEN (__init_array_end = .);
+       }
+       _ectors = .;
+       . = ALIGN(__PAGE_SIZE);
+
+       /* Read-write data that is initialized explicitly in code */
+       _data = .;
+       .data :
+       {
+               *(.data)
+               *(.data.*)
+       }
+       _edata = .;
+       . = ALIGN(__PAGE_SIZE);
+
+       __bss_start = .;
+       /* Read-write data that is not initialized explicitly in code */
+       .bss :
+       {
+               *(.bss)
+               *(.bss.*)
+               *(COMMON)
+               . = ALIGN(__PAGE_SIZE);
+       }
+
+       _end = .;
+}
-- 
2.17.1


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