[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Minios-devel] [UNIKRAFT PATCH 13/13] arch/arm: Add more CPU models to processor optimization list
Current processor optimization list only support generic cortex-a7 and one Allwin cortex-a7 SoC. In this patch, we add all armv7 cortex-a series and two armv8 32-bit CPU to support list. As arm64 and x86_64, we also add auto-detect host CPU option for arm32, even it's not likely to be used on arm32 platforms. New supported armv7 cortex-a CPU models: armv7-a,native armv7-a,generic-armv7-a armv7-a,cortex-a8 armv7-a,cortex-a9 armv7-a,cortex-a5 armv7-a,cortex-a15 armv7-a,cortex-a7 armv7-a,cortex-a12 armv7-a,cortex-a17 armv8-a,cortex-a32(full backward compatibility with Armv7) armv8-a,cortex-a35(full backward compatibility with Armv7) The generic-armv7-a would be our default option of armv7 processor. Signed-off-by: Wei Chen <Wei.Chen@xxxxxxx> --- arch/arm/arm/Config.uk | 57 ++++++++++++++++++++++++++++++++++++++++++++++-- arch/arm/arm/Makefile.uk | 34 +++++++++++++++++++++++++++-- 2 files changed, 87 insertions(+), 4 deletions(-) diff --git a/arch/arm/arm/Config.uk b/arch/arm/arm/Config.uk index 8b4deab..d44cc59 100644 --- a/arch/arm/arm/Config.uk +++ b/arch/arm/arm/Config.uk @@ -1,13 +1,66 @@ choice prompt "Processor Optimization" - default MARCH_ARM32_CORTEXA7 + default MARCH_ARM32_GENERICV7 help Optimize the code for selected target processor +config MARCH_ARM32_NATIVE + bool "Auto-detect host CPU" + help + Optimize compilation to host CPU. Please note that this + option will fail in case of cross-compilation + +config MARCH_ARM32_GENERICV7 + bool "Generic ARMv7 32-bit CPU" + help + Compile for Generic ARMv7 compatible CPUs + +config MARCH_ARM32_CORTEXA5 + bool "Generic Cortex A5" + help + Compile for Cortex-A5 CPUs, no hardware FPU support. + config MARCH_ARM32_CORTEXA7 bool "Generic Cortex A7" help - Compile for Cortex-A7 CPUs, no hardware FPU support + Compile for Cortex-A7 CPUs, no hardware FPU support. + +config MARCH_ARM32_CORTEXA8 + bool "Generic Cortex A8" + help + Compile for Cortex-A8 CPUs, no hardware FPU support. + +config MARCH_ARM32_CORTEXA9 + bool "Generic Cortex A9" + help + Compile for Cortex-A9 CPUs, no hardware FPU support. + +config MARCH_ARM32_CORTEXA12 + bool "Generic Cortex A12" + help + Compile for Cortex-A12 CPUs, no hardware FPU support. + + +config MARCH_ARM32_CORTEXA15 + bool "Generic Cortex A15" + help + Compile for Cortex-A15CPUs, no hardware FPU support. + + +config MARCH_ARM32_CORTEXA17 + bool "Generic Cortex A17" + help + Compile for Cortex-A17 CPUs, no hardware FPU support. + +config MARCH_ARM32_CORTEXA32 + bool "Generic armv8 32-bit Cortex A32" + help + Compile for 32-bit armv8 Cortex-A32 CPUs, hardware FPU support. + +config MARCH_ARM32_CORTEXA35 + bool "Generic armv8 32-bit Cortex A35" + help + Compile for 32-bit armv8 Cortex-A35 CPUs, hardware FPU support. config MARCH_ARM32_A20NEON bool "Cortex A7: AllWinner A20" diff --git a/arch/arm/arm/Makefile.uk b/arch/arm/arm/Makefile.uk index f2493a6..e09aedd 100644 --- a/arch/arm/arm/Makefile.uk +++ b/arch/arm/arm/Makefile.uk @@ -5,12 +5,42 @@ CFLAGS += -marm -fms-extensions CXXFLAGS += -D__ARM_32__ CXXFLAGS += -marm -fms-extensions -# Set GCC flags for MARCH_ARM32_A20NEON. GCC supports -mcpu=cortex-a7 from 4.7 -$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_A20NEON),4,7,-mcpu=cortex-a7 -mtune=cortex-a7 -mfpu=vfpv4-d16 -mfpu=neon-vfpv4 -funsafe-math-optimizations)) +# Set GCC flags for MARCH_ARM32_NATIVE. GCC supports -mcpu=native from 4.7 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_NATIVE),4,7,-mcpu=native -mtune=native)) + +# Set GCC flags for MARCH_ARM32_GENERICV7. GCC supports -mtune=generic-armv7-a from 4.7 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_GENERICV7),4,7,-march=armv7-a -mtune=generic-armv7-a)) + +# Set GCC flags for MARCH_ARM32_CORTEXA5. GCC supports -mcpu=cortex-a5 from 4.5 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_CORTEXA5),4,5,-mcpu=cortex-a5 -mtune=cortex-a5)) # Set GCC flags for MARCH_ARM32_CORTEXA7. GCC supports -mcpu=cortex-a7 from 4.7 $(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_CORTEXA7),4,7,-mcpu=cortex-a7 -mtune=cortex-a7)) +# Set GCC flags for MARCH_ARM32_CORTEXA8. GCC supports -mcpu=cortex-a8 from 4.3 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_CORTEXA8),4,3,-mcpu=cortex-a8 -mtune=cortex-a8)) + +# Set GCC flags for MARCH_ARM32_CORTEXA9. GCC supports -mcpu=cortex-a9 from 4.4 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_CORTEXA9),4,4,-mcpu=cortex-a9 -mtune=cortex-a9)) + +# Set GCC flags for MARCH_ARM32_CORTEXA12. GCC supports -mcpu=cortex-a12 from 4.9 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_CORTEXA12),4,9,-mcpu=cortex-a12 -mtune=cortex-a12)) + +# Set GCC flags for MARCH_ARM32_CORTEXA15. GCC supports -mcpu=cortex-a15 from 4.6 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_CORTEXA15),4,6,-mcpu=cortex-a15 -mtune=cortex-a15)) + +# Set GCC flags for MARCH_ARM32_CORTEXA17. GCC supports -mcpu=cortex-a17 from 6.1 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_CORTEXA17),6,1,-mcpu=cortex-a17 -mtune=cortex-a17)) + +# Set GCC flags for MARCH_ARM32_A20NEON. GCC supports -mcpu=cortex-a7 from 4.7 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_A20NEON),4,7,-mcpu=cortex-a7 -mtune=cortex-a7 -mfpu=vfpv4-d16 -mfpu=neon-vfpv4 -funsafe-math-optimizations)) + +# Set GCC flags for MARCH_ARM32_CORTEXA32. GCC supports -mcpu=cortex-a32 from 6.1 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_CORTEXA32),6,1,-mcpu=cortex-a32 -mtune=cortex-a32)) + +# Set GCC flags for MARCH_ARM32_CORTEXA35. GCC supports -mcpu=cortex-a35 from 6.1 +$(eval $(call set_flags_for_valid_gcc,$(MARCH_ARM32_CORTEXA35),6,1,-mcpu=cortex-a35 -mtune=cortex-a35)) + $(eval $(call addlib,libarmmath)) LIBARMMATH_SRCS-$(ARCH_ARM_32) += $(UK_BASE)/arch/arm/arm/divsi3.S LIBARMMATH_SRCS-$(ARCH_ARM_32) += $(UK_BASE)/arch/arm/arm/ldivmod.S -- 2.7.4 _______________________________________________ Minios-devel mailing list Minios-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/minios-devel
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |