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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Minios-devel] [UNIKRAFT PATCH 2/9] build: Introduce a new variable UK_FAMILY
We want modify the folders layout for multi-architectures like:
unikraft----arch----arm----arm32
| |-----arm64
|
|-----x86----x86
|-----x86_64
In this case, we introduce a new variable UK_FAMILY for build scipts.
we should not expect the user to set or select UK_FAMILY in a menu or
by setting the variable externally. So we retrieve UK_FAMILY directly
from UK_ARCH. Because of this we can keep Compiler.uk, Makefile.uk,
and Config.uk directly under the UK_FAMILY directory.
Signed-off-by: Wei Chen <Wei.Chen@xxxxxxx>
---
Makefile | 25 +++++++++-----
arch/Config.uk | 2 +-
arch/x86/Compiler.uk | 6 ++++
arch/x86/Config.uk | 89 +++++++++++++++++++++++++++++++++++++++++++++++++
arch/x86/Makefile.uk | 37 ++++++++++++++++++++
arch/x86_64/Compiler.uk | 6 ----
arch/x86_64/Config.uk | 89 -------------------------------------------------
arch/x86_64/Makefile.uk | 37 --------------------
8 files changed, 150 insertions(+), 141 deletions(-)
create mode 100644 arch/x86/Compiler.uk
create mode 100644 arch/x86/Config.uk
create mode 100644 arch/x86/Makefile.uk
delete mode 100644 arch/x86_64/Compiler.uk
delete mode 100644 arch/x86_64/Config.uk
delete mode 100644 arch/x86_64/Makefile.uk
diff --git a/Makefile b/Makefile
index f8cb661..49e5070 100644
--- a/Makefile
+++ b/Makefile
@@ -297,7 +297,6 @@ export HOSTARCH := $(shell LC_ALL=C $(HOSTCC_NOCCACHE) -v
2>&1 | \
export HOSTAR HOSTAS HOSTCC HOSTCC_VERSION HOSTCXX HOSTLD HOSTARCH
export HOSTCC_NOCCACHE HOSTCXX_NOCCACHE
-
################################################################################
# Unikraft Architecture
################################################################################
@@ -337,14 +336,24 @@ endif
override ARCH := $(UK_ARCH)
export UK_ARCH ARCH
-# Quick-check if architecture exists
+# Retrive target CPU family from architecture
+export UK_FAMILY ?= $(shell echo "$(UK_ARCH)" | \
+ sed -e "s/-.*//" \
+ -e 's//\1/' \
+ -e 's/x86.*/x86/' \
+ -e 's/sparc64/sparc/' \
+ -e 's/arm.*/arm/' \
+ -e 's/powerpc.*/powerpc/' \
+ -e 's/sh.*/sh/' )
+
+# Quick-check if architecture family exists
ifeq ($(filter $(null_targets) print-vars,$(MAKECMDGOALS)),)
-ifeq ($(wildcard $(UK_BASE)/arch/$(ARCH)/Makefile.uk),)
-$(error Target architecture ($(ARCH)) is currently not supported (could not
find $(UK_BASE)/arch/$(ARCH)/Makefile.uk).)
+ifeq ($(wildcard $(UK_BASE)/arch/$(UK_FAMILY)/Makefile.uk),)
+$(error Target family ($(UK_FAMILY)) is currently not supported (could not
find $(UK_BASE)/arch/$(UK_FAMILY)/Makefile.uk).)
endif
-ifeq ($(wildcard arch/$(ARCH)/Compiler.uk),)
-$(error Target architecture ($(ARCH)) is currently not supported (could not
find $(UK_BASE)/arch/$(ARCH)/Compiler.uk).)
+ifeq ($(wildcard $(UK_BASE)/arch/$(UK_FAMILY)/Compiler.uk),)
+$(error Target family ($(UK_FAMILY)) is currently not supported (could not
find $(UK_BASE)/arch/$(UK_FAMILY)/Compiler.uk).)
endif
endif
@@ -383,7 +392,7 @@ unexport MACHINE
# Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile.uk
CROSS_COMPILE := $(CROSS_COMPILE:"%"=%)
-include $(UK_BASE)/arch/$(UK_ARCH)/Compiler.uk
+include $(UK_BASE)/arch/$(UK_FAMILY)/Compiler.uk
# Make variables (CC, etc...)
LD := $(CROSS_COMPILE)ld
@@ -445,7 +454,7 @@ endif
$(foreach E,$(ELIB_DIR), \
$(eval $(call _import_lib,$(E))); \
)
-$(eval $(call _import_lib,$(UK_BASE)/arch/$(UK_ARCH))) # architecture libraries
+$(eval $(call _import_lib,$(UK_BASE)/arch/$(UK_FAMILY))) # architecture
libraries
include $(UK_BASE)/plat/Makefile.uk # platform libraries
include $(UK_BASE)/lib/Makefile.uk # libraries
include $(UK_BASE)/Makefile.uk # Unikraft base
diff --git a/arch/Config.uk b/arch/Config.uk
index 36df8d1..a040288 100644
--- a/arch/Config.uk
+++ b/arch/Config.uk
@@ -13,7 +13,7 @@ config ARCH_ARM_32
endchoice
if (ARCH_X86_64)
- source "arch/x86_64/Config.uk"
+ source "arch/x86/Config.uk"
endif
if (ARCH_ARM_32)
source "arch/arm/Config.uk"
diff --git a/arch/x86/Compiler.uk b/arch/x86/Compiler.uk
new file mode 100644
index 0000000..a5470ed
--- /dev/null
+++ b/arch/x86/Compiler.uk
@@ -0,0 +1,6 @@
+# set cross compile
+ifeq ($(CROSS_COMPILE),)
+ifneq ($(UK_ARCH),$(HOSTARCH))
+ CROSS_COMPILE := x86_64-linux-gnu-
+endif
+endif
diff --git a/arch/x86/Config.uk b/arch/x86/Config.uk
new file mode 100644
index 0000000..ca49eed
--- /dev/null
+++ b/arch/x86/Config.uk
@@ -0,0 +1,89 @@
+choice
+ prompt "Processor Optimization"
+ default MARCH_GENERIC
+ help
+ Optimize the code for selected target processor
+ Generic x86_64 does not enable any additional CPU features
+ (e.g., SSE, 3DNow!) and produces highly protable code for x86.
+
+config MARCH_NATIVE
+ bool "Auto-detect host CPU"
+ help
+ Optimize compilation to host CPU
+ Please note that this option will fail in case of
cross-compilation
+
+config MARCH_GENERIC
+ bool "Generic 64-bit"
+ help
+ Compile for 64-bit compatible x86 CPUs
+
+config MARCH_NOCONA
+ bool "Intel Pentium 4/Xeon (Nocona)"
+ help
+ Improved version of Intel Pentium 4 CPU with 64-bit extensions,
MMX, SSE, SSE2 and SSE3 instruction set support.
+
+config MARCH_CORE2
+ bool "Intel Core 2/Xeon"
+ help
+ Intel Core 2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3
and SSSE3 instruction set support.
+
+config MARCH_COREI7
+ bool "Intel Core i7/Xeon"
+ help
+ Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3,
SSSE3, SSE4.1 and SSE4.2 instruction set support.
+
+config MARCH_COREI7AVX
+ bool "Intel Core i7/Xeon +AVX"
+ help
+ Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3,
SSSE3, SSE4.1, SSE4.2, AVX, AES and PCLMUL instruction set support.
+
+config MARCH_COREI7AVXI
+ bool "Intel Core/Xeon +AVX +RDRND"
+ help
+ Intel Core CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3,
SSSE3, SSE4.1, SSE4.2, AVX, AES, PCLMUL, FSGSBASE, RDRND and F16C instruction
set support.
+
+config MARCH_ATOM
+ bool "Intel Atom 64-bit"
+ help
+ Intel Atom CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and
SSSE3 instruction set support.
+
+config MARCH_K8
+ bool "AMD Athlon64/Opteron"
+ help
+ Processors based on the AMD K8 core with x86-64 instruction set
support, including the AMD Opteron, Athlon 64, and Athlon 64 FX processors.
(This supersets MMX, SSE, SSE2, 3DNow!, enhanced 3DNow! and 64-bit instruction
set extensions.)
+
+config MARCH_K8SSE3
+ bool "AMD Athlon64/Opteron +SSE3"
+ help
+ Improved versions of AMD K8 cores with SSE3 instruction set
support.
+
+config MARCH_AMDFAM10
+ bool "AMD Family 10h cores"
+ help
+ CPUs based on AMD Family 10h cores with x86-64 instruction set
support. (This supersets MMX, SSE, SSE2, SSE3, SSE4A, 3DNow!, enhanced 3DNow!,
ABM and 64-bit instruction set extensions.)
+
+config MARCH_BTVER1
+ bool "AMD Family 14h cores"
+ help
+ CPUs based on AMD Family 14h cores with x86-64 instruction set
support. (This supersets MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, CX16, ABM and
64-bit instruction set extensions.)
+
+config MARCH_BDVER1
+ bool "AMD Family 15h cores (bdver1)"
+ help
+ CPUs based on AMD Family 15h cores with x86-64 instruction set
support. (This supersets FMA4, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE,
SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set
extensions.)
+
+config MARCH_BDVER2
+ bool "AMD Family 15h cores (bdver2)"
+ help
+ AMD Family 15h core based CPUs with x86-64 instruction set
support. (This supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL,
CX16, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit
instruction set extensions.)
+
+config MARCH_BDVER3
+ bool "AMD Family 15h cores (bdver3)"
+ help
+ AMD Family 15h core based CPUs with x86-64 instruction set
support. (This supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL,
CX16, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit
instruction set extensions.
+
+config MARCH_BTVER2
+ bool "AMD Family 16h cores"
+ help
+ CPUs based on AMD Family 16h cores with x86-64 instruction set
support. This includes MOVBE, F16C, BMI, AVX, PCL_MUL, AES, SSE4.2, SSE4.1,
CX16, ABM, SSE4A, SSSE3, SSE3, SSE2, SSE, MMX and 64-bit instruction set
extensions.
+endchoice
diff --git a/arch/x86/Makefile.uk b/arch/x86/Makefile.uk
new file mode 100644
index 0000000..8c9bfe3
--- /dev/null
+++ b/arch/x86/Makefile.uk
@@ -0,0 +1,37 @@
+ASFLAGS += -D__X86_64__
+ASFLAGS += -m64
+CFLAGS += -D__X86_64__
+CFLAGS += -m64 -mno-red-zone -fno-reorder-blocks
-fno-asynchronous-unwind-tables
+CXXFLAGS += -D__X86_64__
+CXXFLAGS += -m64 -mno-red-zone -fno-reorder-blocks
-fno-asynchronous-unwind-tables
+
+CFLAGS-$(MARCH_GENERIC) += -mtune=generic
+CXXFLAGS-$(MARCH_GENERIC) += -mtune=generic
+CFLAGS-$(MARCH_NOCONA) += -march=nocona
+CXXFLAGS-$(MARCH_NOCONA) += -march=nocona
+CFLAGS-$(MARCH_CORE2) += -march=core2
+CXXFLAGS-$(MARCH_CORE2) += -march=core2
+CFLAGS-$(MARCH_COREI7) += -march=corei7
+CXXFLAGS-$(MARCH_COREI7) += -march=corei7
+CFLAGS-$(MARCH_COREI7AVX) += -march=corei7-avx
+CXXFLAGS-$(MARCH_COREI7AVX) += -march=corei7-avx
+CFLAGS-$(MARCH_COREI7AVXI) += -march=core-avx-i
+CXXFLAGS-$(MARCH_COREI7AVXI) += -march=core-avx-i
+CFLAGS-$(MARCH_ATOM) += -march=atom
+CXXFLAGS-$(MARCH_ATOM) += -march=atom
+CFLAGS-$(MARCH_K8) += -march=k8
+CXXFLAGS-$(MARCH_K8) += -march=k8
+CFLAGS-$(MARCH_K8SSE3) += -march=k8-sse3
+CXXFLAGS-$(MARCH_K8SSE3) += -march=k8-sse3
+CFLAGS-$(MARCH_AMDFAM10) += -march=amdfam10
+CXXFLAGS-$(MARCH_AMDFAM10) += -march=amdfam10
+CFLAGS-$(MARCH_BDVER1) += -march=bdver1
+CXXFLAGS-$(MARCH_BDVER1) += -march=bdver1
+CFLAGS-$(MARCH_BDVER2) += -march=bdver2
+CXXFLAGS-$(MARCH_BDVER2) += -march=bdver2
+CFLAGS-$(MARCH_BDVER3) += -march=bdver3
+CXXFLAGS-$(MARCH_BDVER3) += -march=bdver3
+CFLAGS-$(MARCH_BTVER1) += -march=btver1
+CXXFLAGS-$(MARCH_BTVER1) += -march=btver1
+CFLAGS-$(MARCH_BTVER2) += -march=btver2
+CXXFLAGS-$(MARCH_BTVER2) += -march=btver2
diff --git a/arch/x86_64/Compiler.uk b/arch/x86_64/Compiler.uk
deleted file mode 100644
index a5470ed..0000000
--- a/arch/x86_64/Compiler.uk
+++ /dev/null
@@ -1,6 +0,0 @@
-# set cross compile
-ifeq ($(CROSS_COMPILE),)
-ifneq ($(UK_ARCH),$(HOSTARCH))
- CROSS_COMPILE := x86_64-linux-gnu-
-endif
-endif
diff --git a/arch/x86_64/Config.uk b/arch/x86_64/Config.uk
deleted file mode 100644
index ca49eed..0000000
--- a/arch/x86_64/Config.uk
+++ /dev/null
@@ -1,89 +0,0 @@
-choice
- prompt "Processor Optimization"
- default MARCH_GENERIC
- help
- Optimize the code for selected target processor
- Generic x86_64 does not enable any additional CPU features
- (e.g., SSE, 3DNow!) and produces highly protable code for x86.
-
-config MARCH_NATIVE
- bool "Auto-detect host CPU"
- help
- Optimize compilation to host CPU
- Please note that this option will fail in case of
cross-compilation
-
-config MARCH_GENERIC
- bool "Generic 64-bit"
- help
- Compile for 64-bit compatible x86 CPUs
-
-config MARCH_NOCONA
- bool "Intel Pentium 4/Xeon (Nocona)"
- help
- Improved version of Intel Pentium 4 CPU with 64-bit extensions,
MMX, SSE, SSE2 and SSE3 instruction set support.
-
-config MARCH_CORE2
- bool "Intel Core 2/Xeon"
- help
- Intel Core 2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3
and SSSE3 instruction set support.
-
-config MARCH_COREI7
- bool "Intel Core i7/Xeon"
- help
- Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3,
SSSE3, SSE4.1 and SSE4.2 instruction set support.
-
-config MARCH_COREI7AVX
- bool "Intel Core i7/Xeon +AVX"
- help
- Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3,
SSSE3, SSE4.1, SSE4.2, AVX, AES and PCLMUL instruction set support.
-
-config MARCH_COREI7AVXI
- bool "Intel Core/Xeon +AVX +RDRND"
- help
- Intel Core CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3,
SSSE3, SSE4.1, SSE4.2, AVX, AES, PCLMUL, FSGSBASE, RDRND and F16C instruction
set support.
-
-config MARCH_ATOM
- bool "Intel Atom 64-bit"
- help
- Intel Atom CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and
SSSE3 instruction set support.
-
-config MARCH_K8
- bool "AMD Athlon64/Opteron"
- help
- Processors based on the AMD K8 core with x86-64 instruction set
support, including the AMD Opteron, Athlon 64, and Athlon 64 FX processors.
(This supersets MMX, SSE, SSE2, 3DNow!, enhanced 3DNow! and 64-bit instruction
set extensions.)
-
-config MARCH_K8SSE3
- bool "AMD Athlon64/Opteron +SSE3"
- help
- Improved versions of AMD K8 cores with SSE3 instruction set
support.
-
-config MARCH_AMDFAM10
- bool "AMD Family 10h cores"
- help
- CPUs based on AMD Family 10h cores with x86-64 instruction set
support. (This supersets MMX, SSE, SSE2, SSE3, SSE4A, 3DNow!, enhanced 3DNow!,
ABM and 64-bit instruction set extensions.)
-
-config MARCH_BTVER1
- bool "AMD Family 14h cores"
- help
- CPUs based on AMD Family 14h cores with x86-64 instruction set
support. (This supersets MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, CX16, ABM and
64-bit instruction set extensions.)
-
-config MARCH_BDVER1
- bool "AMD Family 15h cores (bdver1)"
- help
- CPUs based on AMD Family 15h cores with x86-64 instruction set
support. (This supersets FMA4, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE,
SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set
extensions.)
-
-config MARCH_BDVER2
- bool "AMD Family 15h cores (bdver2)"
- help
- AMD Family 15h core based CPUs with x86-64 instruction set
support. (This supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL,
CX16, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit
instruction set extensions.)
-
-config MARCH_BDVER3
- bool "AMD Family 15h cores (bdver3)"
- help
- AMD Family 15h core based CPUs with x86-64 instruction set
support. (This supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL,
CX16, MMX, SSE, SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit
instruction set extensions.
-
-config MARCH_BTVER2
- bool "AMD Family 16h cores"
- help
- CPUs based on AMD Family 16h cores with x86-64 instruction set
support. This includes MOVBE, F16C, BMI, AVX, PCL_MUL, AES, SSE4.2, SSE4.1,
CX16, ABM, SSE4A, SSSE3, SSE3, SSE2, SSE, MMX and 64-bit instruction set
extensions.
-endchoice
diff --git a/arch/x86_64/Makefile.uk b/arch/x86_64/Makefile.uk
deleted file mode 100644
index 8c9bfe3..0000000
--- a/arch/x86_64/Makefile.uk
+++ /dev/null
@@ -1,37 +0,0 @@
-ASFLAGS += -D__X86_64__
-ASFLAGS += -m64
-CFLAGS += -D__X86_64__
-CFLAGS += -m64 -mno-red-zone -fno-reorder-blocks
-fno-asynchronous-unwind-tables
-CXXFLAGS += -D__X86_64__
-CXXFLAGS += -m64 -mno-red-zone -fno-reorder-blocks
-fno-asynchronous-unwind-tables
-
-CFLAGS-$(MARCH_GENERIC) += -mtune=generic
-CXXFLAGS-$(MARCH_GENERIC) += -mtune=generic
-CFLAGS-$(MARCH_NOCONA) += -march=nocona
-CXXFLAGS-$(MARCH_NOCONA) += -march=nocona
-CFLAGS-$(MARCH_CORE2) += -march=core2
-CXXFLAGS-$(MARCH_CORE2) += -march=core2
-CFLAGS-$(MARCH_COREI7) += -march=corei7
-CXXFLAGS-$(MARCH_COREI7) += -march=corei7
-CFLAGS-$(MARCH_COREI7AVX) += -march=corei7-avx
-CXXFLAGS-$(MARCH_COREI7AVX) += -march=corei7-avx
-CFLAGS-$(MARCH_COREI7AVXI) += -march=core-avx-i
-CXXFLAGS-$(MARCH_COREI7AVXI) += -march=core-avx-i
-CFLAGS-$(MARCH_ATOM) += -march=atom
-CXXFLAGS-$(MARCH_ATOM) += -march=atom
-CFLAGS-$(MARCH_K8) += -march=k8
-CXXFLAGS-$(MARCH_K8) += -march=k8
-CFLAGS-$(MARCH_K8SSE3) += -march=k8-sse3
-CXXFLAGS-$(MARCH_K8SSE3) += -march=k8-sse3
-CFLAGS-$(MARCH_AMDFAM10) += -march=amdfam10
-CXXFLAGS-$(MARCH_AMDFAM10) += -march=amdfam10
-CFLAGS-$(MARCH_BDVER1) += -march=bdver1
-CXXFLAGS-$(MARCH_BDVER1) += -march=bdver1
-CFLAGS-$(MARCH_BDVER2) += -march=bdver2
-CXXFLAGS-$(MARCH_BDVER2) += -march=bdver2
-CFLAGS-$(MARCH_BDVER3) += -march=bdver3
-CXXFLAGS-$(MARCH_BDVER3) += -march=bdver3
-CFLAGS-$(MARCH_BTVER1) += -march=btver1
-CXXFLAGS-$(MARCH_BTVER1) += -march=btver1
-CFLAGS-$(MARCH_BTVER2) += -march=btver2
-CXXFLAGS-$(MARCH_BTVER2) += -march=btver2
--
2.7.4
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