From e53fdc1ea750dd3143e2d7cd62a5d38eb446afde Mon Sep 17 00:00:00 2001 From: Brandon Perez Date: Mon, 20 Jul 2015 17:58:24 -0400 Subject: [PATCH 2/3] This patch enables pass-through SMC call support for guest OS's. By default, Xen does not allow for guests to make SMC calls. However, on the DRA72x chips, the kernel needs to make several SMC calls to interact with the secure ROM code. This patch contains two options for solving this. The selected method is to simply allow the guest to make the SMC call, so it passes through the hypervisor without being trapped. The other method, commented out, it to trap and emulate the call. For now, both are committed until it is decided which is more appropiate. --- xen/arch/arm/traps.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 258d4c5..9b9de7b 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -123,8 +123,9 @@ void __cpuinit init_traps(void) CPTR_EL2); /* Setup hypervisor traps */ + // TODO: Choose method WRITE_SYSREG(HCR_PTW|HCR_BSU_INNER|HCR_AMO|HCR_IMO|HCR_FMO|HCR_VM| - HCR_TWE|HCR_TWI|HCR_TSC|HCR_TAC|HCR_SWIO|HCR_TIDCP, HCR_EL2); + HCR_TWE|HCR_TWI/*|HCR_TSC*/|HCR_TAC|HCR_SWIO|HCR_TIDCP, HCR_EL2); isb(); } @@ -2494,6 +2495,18 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs) GUEST_BUG_ON(!psr_mode_is_32bit(regs->cpsr)); perfc_incr(trap_smc32); inject_undef32_exception(regs); +// TODO: Choose method +/*#define omap5_smc(func_id, arg1) \ + asm volatile ("push {r1-r12, lr}\n\t" \ + "mov r12,%0\n\t" \ + "mov r0,%1\n\t" \ + "smc #1\n\t" \ + "pop {r1-r12, lr}" \ + : \ + : "r" (func_id), "r" (arg1)) + + omap5_smc(regs->r12, regs->r0); + advance_pc(regs, hsr); */ break; case HSR_EC_HVC32: GUEST_BUG_ON(!psr_mode_is_32bit(regs->cpsr)); -- 1.7.9.5