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Re: [XenARM] Cortex-A15 Virtualization Support and IOMMU
On Fri, 2 Dec 2011, Adi Habusha wrote:
> I was happy to hear you have release initial virtualization support for
> ARM Cortex A15 using the LPAE, GIC and Generic Timer.
> Can you please elaborate how does DMA address space is managed? Is it
> Guest OS Physical Address (IPA) or system Physical Address?
> If Guest OS (IPA), is there any level of support to IOMMU (based on ARM
> SMMU architecture)
At the moment we are mapping the MMIO regions 1:1, so IPA == PA.
However we are looking forward to introducing SMMU support in the future.
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